> I can't speak for other uarches, but as a guiding principle for Ventana
> we're assuming vsetvl instructions are common and as a result need to be
> very cheap in hardware.   It's likely a good tradeoff for us.


> I could see other uarches making different design choices though.  So 
at
> a high level, do we want this to be driven by cost modeling in some way?

> Not a review yet.  Wanted to get that feedback to you now since the 
rest
> of my day is going to be fairly busy.


Thanks for the feedback. We'll think about it some more.
Just out of curiosity, will the combination of vsetvli + vmv.v.x perform
better than li + vmv.s.x on Ventana's CPU? 




------------------ Original ------------------
From:                                                                           
                                             "Jeff Law"                         
                                                           
<gcc-patches@gcc.gnu.org&gt;;
Date:&nbsp;Fri, Aug 11, 2023 11:04 PM
To:&nbsp;"Lehua 
Ding"<lehua.d...@rivai.ai&gt;;"gcc-patches"<gcc-patches@gcc.gnu.org&gt;;
Cc:&nbsp;"juzhe.zhong"<juzhe.zh...@rivai.ai&gt;;"kito.cheng"<kito.ch...@gmail.com&gt;;"rdapp.gcc"<rdapp....@gmail.com&gt;;"palmer"<pal...@rivosinc.com&gt;;
Subject:&nbsp;Re: [PATCH] RISC-V: Revert the convert from vmv.s.x to vmv.v.i



On 8/11/23 03:01, Lehua Ding wrote:
&gt; Hi,
&gt; 
&gt; This patch revert the convert from vmv.s.x to vmv.v.i and add new pattern
&gt; optimize the special case when the scalar operand is zero.
&gt; 
&gt; Currently, the broadcast pattern where the scalar operand is a imm
&gt; will be converted to vmv.v.i from vmv.s.x and the mask operand will be
&gt; converted from 00..01 to 11..11. There are some advantages and
&gt; disadvantages before and after the conversion after discussing
&gt; with Juzhe offline and we chose not to do this transform.
&gt; 
&gt; Before:
&gt; 
&gt;&nbsp;&nbsp;&nbsp; Advantages: The vsetvli info required by vmv.s.x has 
better compatibility since
&gt;&nbsp;&nbsp;&nbsp; vmv.s.x only required SEW and VLEN be zero or one. That 
mean there
&gt;&nbsp;&nbsp;&nbsp; is more opportunities to combine with other vsetlv infos 
in vsetvl pass.
&gt; 
&gt;&nbsp;&nbsp;&nbsp; Disadvantages: For non-zero scalar imm, one more `li rd, 
imm` instruction
&gt;&nbsp;&nbsp;&nbsp; will be needed.
&gt; 
&gt; After:
&gt; 
&gt;&nbsp;&nbsp;&nbsp; Advantages: No need `li rd, imm` instruction since 
vmv.v.i support imm operand.
&gt; 
&gt;&nbsp;&nbsp;&nbsp; Disadvantages: Like before's advantages. Worse 
compatibility leads to more
&gt;&nbsp;&nbsp;&nbsp; vsetvl instrunctions need.
I can't speak for other uarches, but as a guiding principle for Ventana 
we're assuming vsetvl instructions are common and as a result need to be 
very cheap in hardware.&nbsp;&nbsp; It's likely a good tradeoff for us.

I could see other uarches making different design choices though.&nbsp; So at 
a high level, do we want this to be driven by cost modeling in some way?

Not a review yet.&nbsp; Wanted to get that feedback to you now since the rest 
of my day is going to be fairly busy.

jeff

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