On Thu, 10 Aug 2023, Richard Biener via Gcc-patches wrote: > Isn't this situation similar to the not defined ABI when passing generic > vectors (via __attribute__((vector_size))) that do not map to vectors > supported > by the current ISA? There's cases like vector<2> char or vector<1> double > to consider for example that would fit in a lowpart of a supported vector > register and as in the AVX512 case vectors that are larger than any supported > vector register.
Note there is a difference in some cases (I don't know if this is relevant for x86) between "vectors supported by the current ISA" and "vectors whose ABI, for ISAs that do support them, can be implemented using the current ISA". Specifically, when working on the VFP AAPCS variant for 32-bit Arm, I made sure that generic vectors had the same ABI on all processors supporting VFP, whether or not the vector parts of the instruction set were supported on the chosen processor. On 32-bit Arm that's possible because vector registers are the same as floating-point registers (and even the single-precision-only VFP variant has suitable load and store instructions). Of course if your ABI for some kinds of vectors uses registers not supported on all processors, and on the processors that do support those registers you use that ABI for corresponding generic vectors, then you won't be able to be compatible with that ABI for those generic vectors on processors without those registers. -- Joseph S. Myers jos...@codesourcery.com
