gcc/ChangeLog:
* config/i386/driver-i386.cc (host_detect_local_cpu):
Do not append -mno-avx10-max-512bit for -march=native.
* common/config/i386/i386-common.cc
(ix86_check_avx10_vector_width): New function to check isa_flags
to emit a warning when there is a conflict in AVX10 options for
vector width.
(ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx10_1-15.c: New test.
* gcc.target/i386/avx10_1-16.c: Ditto.
* gcc.target/i386/avx10_1-17.c: Ditto.
* gcc.target/i386/avx10_1-18.c: Ditto.
---
gcc/common/config/i386/i386-common.cc | 20 ++++++++++++++++++++
gcc/config/i386/driver-i386.cc | 3 ++-
gcc/config/i386/i386-options.cc | 2 +-
gcc/testsuite/gcc.target/i386/avx10_1-15.c | 5 +++++
gcc/testsuite/gcc.target/i386/avx10_1-16.c | 5 +++++
gcc/testsuite/gcc.target/i386/avx10_1-17.c | 13 +++++++++++++
gcc/testsuite/gcc.target/i386/avx10_1-18.c | 13 +++++++++++++
7 files changed, 59 insertions(+), 2 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-15.c
create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-16.c
create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-17.c
create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-18.c
diff --git a/gcc/common/config/i386/i386-common.cc
b/gcc/common/config/i386/i386-common.cc
index ec94251dd4c..db88befc9b8 100644
--- a/gcc/common/config/i386/i386-common.cc
+++ b/gcc/common/config/i386/i386-common.cc
@@ -428,6 +428,24 @@ ix86_check_avx512 (struct gcc_options *opts)
return true;
}
+/* Emit a warning when there is a conflict vector width in AVX10 options. */
+static void
+ix86_check_avx10_vector_width (struct gcc_options *opts, bool avx10_max_512)
+{
+ if (avx10_max_512)
+ {
+ if (((opts->x_ix86_isa_flags2 | ~OPTION_MASK_ISA2_AVX10_512BIT)
+ == ~OPTION_MASK_ISA2_AVX10_512BIT)
+ && (opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_AVX10_512BIT))
+ warning (0, "The options used for AVX10 have conflict vector width, "
+ "using the latter 512 as vector width");
+ }
+ else if (opts->x_ix86_isa_flags2 & opts->x_ix86_isa_flags2_explicit
+ & OPTION_MASK_ISA2_AVX10_512BIT)
+ warning (0, "The options used for AVX10 have conflict vector width, "
+ "using the latter 256 as vector width");
+}
+
/* Implement TARGET_HANDLE_OPTION. */
bool
@@ -1415,6 +1433,7 @@ ix86_handle_option (struct gcc_options *opts,
return true;
case OPT_mavx10_1_256:
+ ix86_check_avx10_vector_width (opts, false);
opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX10_1_SET;
opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX10_1_SET;
opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_AVX10_512BIT_SET;
@@ -1424,6 +1443,7 @@ ix86_handle_option (struct gcc_options *opts,
return true;
case OPT_mavx10_1_512:
+ ix86_check_avx10_vector_width (opts, true);
opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX10_1_SET;
opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX10_1_SET;
opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX10_512BIT_SET;
diff --git a/gcc/config/i386/driver-i386.cc b/gcc/config/i386/driver-i386.cc
index 227ace6ff83..f4551a74e3a 100644
--- a/gcc/config/i386/driver-i386.cc
+++ b/gcc/config/i386/driver-i386.cc
@@ -854,7 +854,8 @@ const char *host_detect_local_cpu (int argc, const char
**argv)
options = concat (options, " ",
isa_names_table[i].option, NULL);
}
- else if (isa_names_table[i].feature != FEATURE_AVX10_1)
+ else if ((isa_names_table[i].feature != FEATURE_AVX10_1)
+ && (isa_names_table[i].feature != FEATURE_AVX10_512BIT))
options = concat (options, neg_option,
isa_names_table[i].option + 2, NULL);
}
diff --git a/gcc/config/i386/i386-options.cc b/gcc/config/i386/i386-options.cc
index b2281fbd4b5..8f9b825b527 100644
--- a/gcc/config/i386/i386-options.cc
+++ b/gcc/config/i386/i386-options.cc
@@ -985,7 +985,7 @@ ix86_valid_target_attribute_inner_p (tree fndecl, tree
args, char *p_strings[],
ix86_opt_ix86_no,
ix86_opt_str,
ix86_opt_enum,
- ix86_opt_isa,
+ ix86_opt_isa
};
static const struct
diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-15.c
b/gcc/testsuite/gcc.target/i386/avx10_1-15.c
new file mode 100644
index 00000000000..fd873c9694c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx10_1-15.c
@@ -0,0 +1,5 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -march=x86-64 -mavx10.1-512 -mavx10.1-256" } */
+/* { dg-warning "The options used for AVX10 have conflict vector width, using
the latter 256 as vector width" "" { target *-*-* } 0 } */
+
+#include "avx10_1-1.c"
diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-16.c
b/gcc/testsuite/gcc.target/i386/avx10_1-16.c
new file mode 100644
index 00000000000..1e664ebd1f2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx10_1-16.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=x86-64 -mavx10.1-256 -mavx10.1-512" } */
+/* { dg-warning "The options used for AVX10 have conflict vector width, using
the latter 512 as vector width" "" { target *-*-* } 0 } */
+
+#include "avx10_1-2.c"
diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-17.c
b/gcc/testsuite/gcc.target/i386/avx10_1-17.c
new file mode 100644
index 00000000000..7dfff3aeeac
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx10_1-17.c
@@ -0,0 +1,13 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2" } */
+
+#include <immintrin.h>
+
+__attribute__ ((target ("avx10.1-512,avx10.1-256"))) void
+f1 ()
+{ /* { dg-warning "The options used for AVX10 have conflict vector width,
using the latter 256 as vector width" } */
+ register __m256d a __asm ("ymm17");
+ register __m256d b __asm ("ymm16");
+ a = _mm256_add_pd (a, b);
+ asm volatile ("" : "+v" (a));
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-18.c
b/gcc/testsuite/gcc.target/i386/avx10_1-18.c
new file mode 100644
index 00000000000..955cca185fd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx10_1-18.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-march=x86-64" } */
+/* { dg-final { scan-assembler "%zmm" } } */
+
+typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__));
+
+__attribute__ ((target ("avx10.1-256,avx10.1-512"))) __m512d
+foo ()
+{ /* { dg-warning "The options used for AVX10 have conflict vector width,
using the latter 512 as vector width" } */
+ __m512d a, b;
+ a = a + b;
+ return a;
+}
--
2.31.1
