On Wed, 19 Jul 2023, YunQiang Su wrote:
> Eric Botcazou <botca...@adacore.com> ?2023?7?19??? 17:45???
> >
> > > I don't see that. That's definitely not what GCC expects here,
> > > the left-most word of the doubleword should be unchanged.
> > >
> > > Your testcase should be a dg-do-run and probably more like
> > >
> > > NOMIPS16 int __attribute__((noipa)) test (const unsigned char *buf)
> > > {
> > > int val;
> > > ((unsigned char*)&val)[0] = *buf++;
> > > ((unsigned char*)&val)[1] = *buf++;
> > > ((unsigned char*)&val)[2] = *buf++;
> > > ((unsigned char*)&val)[3] = *buf++;
> > > return val;
> > > }
> > > int main()
> > > {
> > > int val = 0x01020304;
> > > val = test (&val);
> > > if (val != 0x01020304)
> > > abort ();
> > > }
> > >
> > > not sure if I got endianess correct. Now, the question is what
> > > WORD_REGISTER_OPERATIONS implies for a bitfield insert and what
> > > the MIPS ABI says for returning SImode.
> >
>
> MIPS N64 ABI uses 2 GPR for integer return values.
> If the return value is SImode, the first v0 register is used, and it
> must be sign-extended,
> aka the bits[64-31] are all same.
>
> Yes, it is same for signed and unsigned int32.
>
> https://irix7.com/techpubs/007-2816-004.pdf
> Page 6:
> 32-bit integer (int) parameters are always sign-extended when passed
> in registers,
> whether of signed or unsigned type. [This issue does not arise in the
> o32-bit ABI.]
Note I think Andrews comment#7 in the PR is spot-on then, the issue
isn't the bitfield inserts but the compare where combine elides
the sign_extend in favor of a subreg. That's likely some wrongdoing
in simplify-rtx in the context of WORD_REGISTER_OPERATIONS.
Richard.
