Do not reinitialize vector lanes to zero since they are already initialized to
zero.

Bootstrapped and regression tested on s390x.

gcc/ChangeLog:

        * config/s390/s390.cc (vec_init): Fix default case

gcc/Testsuite/ChangeLog:

        * gcc.target/s390/vector/vec-init-3.c: New test.

Signed-off-by: Juergen Christ <jchr...@linux.ibm.com>
---
 gcc/config/s390/s390.cc                         | 11 ++++++-----
 .../gcc.target/s390/vector/vec-init-3.c         | 17 +++++++++++++++++
 2 files changed, 23 insertions(+), 5 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/s390/vector/vec-init-3.c

diff --git a/gcc/config/s390/s390.cc b/gcc/config/s390/s390.cc
index 505de995da87..31b646782721 100644
--- a/gcc/config/s390/s390.cc
+++ b/gcc/config/s390/s390.cc
@@ -7130,11 +7130,12 @@ s390_expand_vec_init (rtx target, rtx vals)
       if (!general_operand (elem, GET_MODE (elem)))
        elem = force_reg (inner_mode, elem);
 
-      emit_insn (gen_rtx_SET (target,
-                             gen_rtx_UNSPEC (mode,
-                                             gen_rtvec (3, elem,
-                                                        GEN_INT (i), target),
-                                             UNSPEC_VEC_SET)));
+      if (elem != const0_rtx)
+       emit_insn (gen_rtx_SET (target,
+                               gen_rtx_UNSPEC (mode,
+                                               gen_rtvec (3, elem,
+                                                          GEN_INT (i), target),
+                                               UNSPEC_VEC_SET)));
     }
 }
 
diff --git a/gcc/testsuite/gcc.target/s390/vector/vec-init-3.c 
b/gcc/testsuite/gcc.target/s390/vector/vec-init-3.c
new file mode 100644
index 000000000000..12008a963ffb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/vector/vec-init-3.c
@@ -0,0 +1,17 @@
+/* Check that the default case of the vec_init expander does its job.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -march=z13" } */
+
+typedef __attribute__((vector_size(16))) signed int v4si;
+
+extern v4si G;
+
+v4si
+n (signed int a)
+{
+  return G == (v4si){ a };
+}
+/* { dg-final { scan-assembler-times "vzero" 1 } } */
+/* { dg-final { scan-assembler-times "vlvgf\t" 1 } } */
+/* { dg-final { scan-assembler-not "vleif\t" } } */
-- 
2.39.3

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