On Wed, 28 Jun 2023, Jeff Law wrote: > > > On 6/28/23 22:04, Li, Pan2 wrote: > > It seems this patch may result in many test ICE failures on RISC-V backend. > > Could you help to double confirm about it follow the possible reproduce > > steps like blow? Thank you! > I've one ICE due to this change as well but it wasn't in the > tree-ssa-math-opts.code like this one is. In my case we're in a place where > it doesn't look like we expect a vector type to show up, but it does and we > can likely just prune it away. > > Anyway, your fault is in here: > > > > divmod_candidate_p: > > if (TYPE_PRECISION (type) <= HOST_BITS_PER_WIDE_INT > && TYPE_PRECISION (type) <= BITS_PER_WORD) > return false; > > TYPE is almost certainly a vector type. The question we need to answer (and > I'm not likely to get to it tomorrow) would be whether or not TYPE can > legitimately be a vector type here.
I think GCN people wanted to make this code work for vectors, the most obvious local fix is to use element_precision (type) above. Note usually vector integer divisions are not a thing so this might explain why you're seeing this only with RVV? Richard.
