This minor tweak to the nvptx backend switches the representation of
of the brev instruction from an UNSPEC to instead use the new BITREVERSE
rtx. This allows various RTL optimizations including evaluation (constant
folding) of integer constant arguments at compile-time.
This patch has been tested on nvptx-none with make and make -k check
with no new failures. Ok for mainline?
2023-06-07 Roger Sayle <ro...@nextmovesoftware.com>
gcc/ChangeLog
* config/nvptx/nvptx.md (UNSPEC_BITREV): Delete.
(bitrev<mode>2): Represent using bitreverse.
Thanks in advance,
Roger
--
diff --git a/gcc/config/nvptx/nvptx.md b/gcc/config/nvptx/nvptx.md
index 1bb9304..7a7c994 100644
--- a/gcc/config/nvptx/nvptx.md
+++ b/gcc/config/nvptx/nvptx.md
@@ -34,8 +34,6 @@
UNSPEC_FPINT_CEIL
UNSPEC_FPINT_NEARBYINT
- UNSPEC_BITREV
-
UNSPEC_ALLOCA
UNSPEC_SET_SOFTSTACK
@@ -636,8 +634,7 @@
(define_insn "bitrev<mode>2"
[(set (match_operand:SDIM 0 "nvptx_register_operand" "=R")
- (unspec:SDIM [(match_operand:SDIM 1 "nvptx_register_operand" "R")]
- UNSPEC_BITREV))]
+ (bitreverse:SDIM (match_operand:SDIM 1 "nvptx_register_operand" "R")))]
""
"%.\\tbrev.b%T0\\t%0, %1;")
