[committed 1/2] RISC-V: Fix ternary instruction attribute bug

[Pan Li via Gcc-patches]

From: Juzhe-Zhong <juzhe.zh...@rivai.ai>

Fix bug of vector.md which generate incorrect information to
VSETVL PASS when testing FMA auto vectorization ternop-3.c.

Signed-off-by: Juzhe-Zhong <juzhe.zh...@rivai.ai>

gcc/ChangeLog:

        * config/riscv/vector.md: Fix vimuladd instruction bug.
---
 gcc/config/riscv/vector.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index 15f66efaa48..cd696da5d89 100644
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -388,7 +388,7 @@ (define_attr "avl_type" ""
             (symbol_ref "INTVAL (operands[7])"))
 
         (eq_attr "type" "vldux,vldox,vialu,vshift,viminmax,vimul,vidiv,vsalu,\
-                         viwalu,viwmul,vnshift,vimuladd,vaalu,vsmul,vsshift,\
+                         viwalu,viwmul,vnshift,vaalu,vsmul,vsshift,\
                          
vnclip,vicmp,vfalu,vfmul,vfminmax,vfdiv,vfwalu,vfwmul,\
                          vfsgnj,vfcmp,vfmuladd,vslideup,vslidedown,vislide1up,\
                          
vislide1down,vfslide1up,vfslide1down,vgather,viwmuladd,vfwmuladd,\
-- 
2.34.1