speculation_barrier for MIPS needs sync+jr.hb (r2+),
so we implement __speculation_barrier in libgcc, like arm32 does.
gcc/ChangeLog:
* config/mips/mips-protos.h (mips_emit_speculation_barrier): New
prototype.
* config/mips/mips.cc (speculation_barrier_libfunc): New static
variable.
(mips_init_libfuncs): Initialize it.
(mips_emit_speculation_barrier): New function.
* config/mips/mips.md (speculation_barrier): Call
mips_emit_speculation_barrier.
* configure.ac: error if gas doesn't accept ssnop for mips1.
* configure: regenerated.
* doc/install.texi: documents mips requires binutils 2.21+.
libgcc/ChangeLog:
* config/mips/lib1funcs.S: New file.
define __speculation_barrier and include mips16.S.
* config/mips/t-mips: define LIB1ASMSRC as mips/lib1funcs.S.
define LIB1ASMFUNCS as _speculation_barrier.
set version info for __speculation_barrier.
* config/mips/libgcc-mips.ver: New file.
* config/mips/t-mips16: don't define LIB1ASMSRC as mips16.S is
included in lib1funcs.S now.
---
gcc/config/mips/mips-protos.h | 2 +
gcc/config/mips/mips.cc | 13 ++++++
gcc/config/mips/mips.md | 12 ++++++
gcc/configure | 32 +++++++++++++++
gcc/configure.ac | 7 ++++
gcc/doc/install.texi | 2 +
libgcc/config/mips/lib1funcs.S | 63 ++++++++++++++++++++++++++++++
libgcc/config/mips/libgcc-mips.ver | 21 ++++++++++
libgcc/config/mips/t-mips | 7 ++++
libgcc/config/mips/t-mips16 | 3 +-
10 files changed, 160 insertions(+), 2 deletions(-)
create mode 100644 libgcc/config/mips/lib1funcs.S
create mode 100644 libgcc/config/mips/libgcc-mips.ver
diff --git a/gcc/config/mips/mips-protos.h b/gcc/config/mips/mips-protos.h
index 20483469105..da7902c235b 100644
--- a/gcc/config/mips/mips-protos.h
+++ b/gcc/config/mips/mips-protos.h
@@ -388,4 +388,6 @@ extern void mips_register_frame_header_opt (void);
extern void mips_expand_vec_cond_expr (machine_mode, machine_mode, rtx *);
extern void mips_expand_vec_cmp_expr (rtx *);
+extern void mips_emit_speculation_barrier_function (void);
+
#endif /* ! GCC_MIPS_PROTOS_H */
diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc
index ca822758b41..139707fda34 100644
--- a/gcc/config/mips/mips.cc
+++ b/gcc/config/mips/mips.cc
@@ -13611,6 +13611,9 @@ mips_autovectorize_vector_modes (vector_modes *modes,
bool)
return 0;
}
+
+static GTY(()) rtx speculation_barrier_libfunc;
+
/* Implement TARGET_INIT_LIBFUNCS. */
static void
@@ -13680,6 +13683,7 @@ mips_init_libfuncs (void)
synchronize_libfunc = init_one_libfunc ("__sync_synchronize");
init_sync_libfuncs (UNITS_PER_WORD);
}
+ speculation_barrier_libfunc = init_one_libfunc ("__speculation_barrier");
}
/* Build up a multi-insn sequence that loads label TARGET into $AT. */
@@ -19092,6 +19096,15 @@ mips_avoid_hazard (rtx_insn *after, rtx_insn *insn,
int *hilo_delay,
}
}
+/* Emit a speculation barrier.
+ JR.HB is needed, so we need to put
+ speculation_barrier_libfunc in libgcc */
+void
+mips_emit_speculation_barrier_function ()
+{
+ emit_library_call (speculation_barrier_libfunc, LCT_NORMAL, VOIDmode);
+}
+
/* A SEQUENCE is breakable iff the branch inside it has a compact form
and the target has compact branches. */
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index ac1d77afc7d..5d04ac566dd 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -160,6 +160,8 @@
;; The `.insn' pseudo-op.
UNSPEC_INSN_PSEUDO
UNSPEC_JRHB
+
+ VUNSPEC_SPECULATION_BARRIER
])
(define_constants
@@ -7455,6 +7457,16 @@
mips_expand_conditional_move (operands);
DONE;
})
+
+(define_expand "speculation_barrier"
+ [(unspec_volatile [(const_int 0)] VUNSPEC_SPECULATION_BARRIER)]
+ ""
+ "
+ mips_emit_speculation_barrier_function ();
+ DONE;
+ "
+)
+
;;
;; ....................
diff --git a/gcc/configure b/gcc/configure
index 191f68581b3..e55b40d7f4c 100755
--- a/gcc/configure
+++ b/gcc/configure
@@ -28699,6 +28699,38 @@ $as_echo "#define HAVE_LD_PERSONALITY_RELAXATION 1"
>>confdefs.h
fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for mips1
recognize ssnop" >&5
+$as_echo_n "checking assembler for mips1 recognize ssnop... " >&6; }
+if ${gcc_cv_as_mips1_ssnop+:} false; then :
+ $as_echo_n "(cached) " >&6
+else
+ gcc_cv_as_mips1_ssnop=no
+ if test x$gcc_cv_as != x; then
+ $as_echo 'ssnop' > conftest.s
+ if { ac_try='$gcc_cv_as $gcc_cv_as_flags -mabi=32 -mips1 -o conftest.o
conftest.s >&5'
+ { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
+ echo $ac_try
+ (eval $ac_try) 2>&5
+ ac_status=$?
+ $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+ test $ac_status = 0; }; }
+ then
+ gcc_cv_as_mips1_ssnop=yes
+ else
+ echo "configure: failed program was" >&5
+ cat conftest.s >&5
+ fi
+ rm -f conftest.o conftest.s
+ fi
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_mips1_ssnop" >&5
+$as_echo "$gcc_cv_as_mips1_ssnop" >&6; }
+
+
+ if test x$gcc_cv_as_mips1_ssnop = xno; then
+ as_fn_error $? "New binutils is required to support ssnop even for MIPS
I: 2.21+" "$LINENO" 5
+ fi
+
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for -mnan=
support" >&5
$as_echo_n "checking assembler for -mnan= support... " >&6; }
if ${gcc_cv_as_mips_nan+:} false; then :
diff --git a/gcc/configure.ac b/gcc/configure.ac
index 075424669c9..6d2cb4c51a0 100644
--- a/gcc/configure.ac
+++ b/gcc/configure.ac
@@ -5270,6 +5270,13 @@ EOF
pointers into PC-relative form.])
fi
+ gcc_GAS_CHECK_FEATURE([mips1 recognize ssnop], gcc_cv_as_mips1_ssnop,
+ [-mabi=32 -mips1], [ssnop],,,)
+ if test x$gcc_cv_as_mips1_ssnop = xno; then
+ AC_MSG_ERROR(
+ [New binutils is required to support ssnop even for MIPS I: 2.21+])
+ fi
+
gcc_GAS_CHECK_FEATURE([-mnan= support],
gcc_cv_as_mips_nan,
[-mnan=2008],,,
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index fa91ce1953d..fae6ec5f7a9 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -4610,6 +4610,8 @@ the use of break, use the @option{--with-divide=breaks}
@command{configure} option when configuring GCC@. The default is to
use traps on systems that support them.
+GNU Binutils 2.21 or newer is required.
+
@html
<hr />
@end html
diff --git a/libgcc/config/mips/lib1funcs.S b/libgcc/config/mips/lib1funcs.S
new file mode 100644
index 00000000000..b6e7c1362dd
--- /dev/null
+++ b/libgcc/config/mips/lib1funcs.S
@@ -0,0 +1,63 @@
+/* Copyright (C) 2023 Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+#include "mips16.S"
+
+#ifdef L_speculation_barrier
+
+/* MIPS16e1 has no sync/jr.hb instructions, and MIPS16e2 lacks of jr.hb.
+ So, we use normal MIPS code here, just like what we do for __sync_* */
+ .set nomips16
+
+ .set noreorder
+ .globl __speculation_barrier
+ .ent __speculation_barrier
+
+__speculation_barrier:
+ .set push
+#if __mips >= 2 || defined(__linux)
+ /* MIPS1 has no sync. while Linux can trap&emu sync */
+ /* FIXME: Will somebody use linux/gcc for MIPS1/baremetal? */
+ sync /* complementation barrier for memory */
+#else
+ /* ssnop is actually available since R5500,
+ and it will be decoded as nop on earlier processors.
+ gas can recognize it even with -march=mips1 since 2.21 */
+ /* MIPS1 to MIPSr1: R10000 have 7 stage pipeline,
+ so 8 ssnop is sufficient to block all speculation on all CPUs */
+ .rept 8
+ ssnop
+ .endr
+#endif
+
+
+#if __mips_isa_rev >= 1
+ /* yes, the below one is the encoding, don't remove this arm,
+ since r6 changes the encoding */
+ jr.hb $ra /* Jump with instruction hazard barrier */
+#else
+ .word 0x03e00408 /* The encoding of jr.hb $ra */
+#endif
+ .set pop
+ .end __speculation_barrier
+
+ .set reorder
+#endif
diff --git a/libgcc/config/mips/libgcc-mips.ver
b/libgcc/config/mips/libgcc-mips.ver
new file mode 100644
index 00000000000..68f8d2bbd51
--- /dev/null
+++ b/libgcc/config/mips/libgcc-mips.ver
@@ -0,0 +1,21 @@
+# Copyright (C) 2023 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3. If not see
+# <http://www.gnu.org/licenses/>.
+
+GCC_14.0 {
+ __speculation_barrier
+}
diff --git a/libgcc/config/mips/t-mips b/libgcc/config/mips/t-mips
index 4fb8e136217..d05ef7cbf74 100644
--- a/libgcc/config/mips/t-mips
+++ b/libgcc/config/mips/t-mips
@@ -7,3 +7,10 @@ softfp_truncations :=
softfp_exclude_libgcc2 := n
LIB2ADD_ST += $(srcdir)/config/mips/lib2funcs.c
+
+
+LIB1ASMSRC = mips/lib1funcs.S
+LIB1ASMFUNCS = _speculation_barrier
+
+# Version these symbols if building libgcc.so.
+SHLIB_MAPFILES += $(srcdir)/config/mips/libgcc-mips.ver
diff --git a/libgcc/config/mips/t-mips16 b/libgcc/config/mips/t-mips16
index 2bad5119d51..5fd9d60d7a3 100644
--- a/libgcc/config/mips/t-mips16
+++ b/libgcc/config/mips/t-mips16
@@ -16,8 +16,7 @@
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
-LIB1ASMSRC = mips/mips16.S
-LIB1ASMFUNCS = _m16addsf3 _m16subsf3 _m16mulsf3 _m16divsf3 \
+LIB1ASMFUNCS += _m16addsf3 _m16subsf3 _m16mulsf3 _m16divsf3 \
_m16eqsf2 _m16nesf2 _m16gtsf2 _m16gesf2 _m16lesf2 _m16ltsf2 \
_m16unordsf2 \
_m16fltsisf _m16fix_truncsfsi _m16fltunsisf \
--
2.30.2
