> -----Original Message-----
> From: Christophe Lyon <christophe.l...@arm.com>
> Sent: Thursday, May 11, 2023 1:19 PM
> To: gcc-patches@gcc.gnu.org; Kyrylo Tkachov <kyrylo.tkac...@arm.com>;
> Richard Earnshaw <richard.earns...@arm.com>; Richard Sandiford
> <richard.sandif...@arm.com>
> Cc: Christophe Lyon <christophe.l...@arm.com>
> Subject: [PATCH 01/24] arm: [MVE intrinsics] factorize vaddlvaq
> 
> Factorize vaddlvaq builtins so that they use parameterized names.

This series is ok (the changes look quite regular throughout).
Thanks,
Kyrill

> 
> 2022-10-25  Christophe Lyon  <christophe.l...@arm.com>
> 
>       gcc/
>       * config/arm/iterators.md (mve_insn): Add vaddlva.
>       * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
>       (@mve_<mve_insn>q_<supf>v4si): ... this.
>       (mve_vaddlvaq_p_<supf>v4si): Rename into ...
>       (@mve_<mve_insn>q_p_<supf>v4si): ... this.
> ---
>  gcc/config/arm/iterators.md | 2 ++
>  gcc/config/arm/mve.md       | 8 ++++----
>  2 files changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md
> index 2f6de937ef7..ff146afd913 100644
> --- a/gcc/config/arm/iterators.md
> +++ b/gcc/config/arm/iterators.md
> @@ -759,6 +759,8 @@ (define_int_attr mve_insn [
>                (VABDQ_S "vabd") (VABDQ_U "vabd") (VABDQ_F "vabd")
>                (VABSQ_M_F "vabs")
>                (VABSQ_M_S "vabs")
> +              (VADDLVAQ_P_S "vaddlva") (VADDLVAQ_P_U "vaddlva")
> +              (VADDLVAQ_S "vaddlva") (VADDLVAQ_U "vaddlva")
>                (VADDLVQ_P_S "vaddlv") (VADDLVQ_P_U "vaddlv")
>                (VADDLVQ_S "vaddlv") (VADDLVQ_U "vaddlv")
>                (VADDQ_M_N_S "vadd") (VADDQ_M_N_U "vadd")
> (VADDQ_M_N_F "vadd")
> diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
> index f5cb8ef48ef..b548eced4f5 100644
> --- a/gcc/config/arm/mve.md
> +++ b/gcc/config/arm/mve.md
> @@ -1222,7 +1222,7 @@ (define_insn "@mve_<mve_insn>q_f<mode>"
>  ;;
>  ;; [vaddlvaq_s vaddlvaq_u])
>  ;;
> -(define_insn "mve_vaddlvaq_<supf>v4si"
> +(define_insn "@mve_<mve_insn>q_<supf>v4si"
>    [
>     (set (match_operand:DI 0 "s_register_operand" "=r")
>       (unspec:DI [(match_operand:DI 1 "s_register_operand" "0")
> @@ -1230,7 +1230,7 @@ (define_insn "mve_vaddlvaq_<supf>v4si"
>        VADDLVAQ))
>    ]
>    "TARGET_HAVE_MVE"
> -  "vaddlva.<supf>32\t%Q0, %R0, %q2"
> +  "<mve_insn>.<supf>32\t%Q0, %R0, %q2"
>    [(set_attr "type" "mve_move")
>  ])
> 
> @@ -2534,7 +2534,7 @@ (define_insn "@mve_<mve_insn>q_m_f<mode>"
>  ;;
>  ;; [vaddlvaq_p_s vaddlvaq_p_u])
>  ;;
> -(define_insn "mve_vaddlvaq_p_<supf>v4si"
> +(define_insn "@mve_<mve_insn>q_p_<supf>v4si"
>    [
>     (set (match_operand:DI 0 "s_register_operand" "=r")
>       (unspec:DI [(match_operand:DI 1 "s_register_operand" "0")
> @@ -2543,7 +2543,7 @@ (define_insn "mve_vaddlvaq_p_<supf>v4si"
>        VADDLVAQ_P))
>    ]
>    "TARGET_HAVE_MVE"
> -  "vpst\;vaddlvat.<supf>32\t%Q0, %R0, %q2"
> +  "vpst\;<mve_insn>t.<supf>32\t%Q0, %R0, %q2"
>    [(set_attr "type" "mve_move")
>     (set_attr "length""8")])
>  ;;
> --
> 2.34.1

Reply via email to