[PATCH][committed] aarch64: PR target/99195 annotate HADDSUB patterns for vec-concat with zero

[Kyrylo Tkachov via Gcc-patches]

Hi all,

Further straightforward patch for the various halving intrinsics with or 
without rounding, plus tests.
Bootstrapped and tested on aarch64-none-linux-gnu and aarch64_be-none-elf.
Pushing to trunk.
Thanks,
Kyrill

gcc/ChangeLog:

        PR target/99195
        * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename 
to...
        (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.

gcc/testsuite/ChangeLog:

        PR target/99195
        * gcc.target/aarch64/simd/pr99195_1.c: Add tests for halving and 
rounding
        add/sub intrinsics.

haddsubvcz.patch
Description: haddsubvcz.patch