This patch contains some minor tweak to xstormy16's machine description most significantly providing a pattern for HImode rotate left by a single bit that requires only two instructions.
unsigned short foo(unsigned short x) { return (x << 1) | (x >> 15); } currently with -O2 generates: foo: mov r7,r2 shr r7,#15 shl r2,#1 or r2,r7 ret with this patch, GCC now generates: foo: shl r2,#1 | adc r2,#0 ret Additionally neghi2 is converted to a define_insn (so that the RTL optimizers see the negation semantics), and HImode rotations by 8-bits can now be recognized and implemented using swpb. This patch has been tested by building a cross-compiler to xstormy16-elf from x86_64-pc-linux-gnu and confirming the new test cases pass. Ok for mainline? 2023-04-29 Roger Sayle <ro...@nextmovesoftware.com> gcc/ChangeLog * config/stormy16/stormy16.md (neghi2): Convert from a define_expand to a define_insn. (*rotatehi_1): New define_insn for efficient 2 insn sequence. (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb. gcc/testsuite/ChangeLog * gcc.target/xstormy16/neghi2.c: New test case. * gcc.target/rotatehi-1.c: Likewise. Thanks in advance, Roger --
diff --git a/gcc/config/stormy16/stormy16.md b/gcc/config/stormy16/stormy16.md index b2e86ee..be1ee04 100644 --- a/gcc/config/stormy16/stormy16.md +++ b/gcc/config/stormy16/stormy16.md @@ -514,13 +518,13 @@ ;; Negation -(define_expand "neghi2" - [(set (match_operand:HI 0 "register_operand" "") - (not:HI (match_operand:HI 1 "register_operand" ""))) - (parallel [(set (match_dup 0) (plus:HI (match_dup 0) (const_int 1))) +(define_insn "neghi2" + [(parallel [(set (match_operand:HI 0 "register_operand" "=r") + (neg:HI (match_operand:HI 1 "register_operand" "0"))) (clobber (reg:BI CARRY_REG))])] "" - "") + "not %0 | add %0,#1" + [(set_attr "length" "4")]) ;; :::::::::::::::::::: ;; :: @@ -554,6 +558,24 @@ (clobber (reg:BI CARRY_REG))] "" "shr %0,%2") + +;; HImode rotate left by 1 bit +(define_insn "*rotatehi_1" + [(set (match_operand:HI 0 "register_operand" "=r") + (rotate:HI (match_operand:HI 1 "register_operand" "0") + (const_int 1))) + (clobber (reg:BI CARRY_REG))] + "" + "shl %0,#1 | adc %0,#0" + [(set_attr "length" "4")]) + +;; HImode rotate left by 8 bits +(define_insn "*<code>hi_8" + [(set (match_operand:HI 0 "register_operand" "=r") + (any_rotate:HI (match_operand:HI 1 "register_operand" "0") + (const_int 8)))] + "" + "swpb %0") ;; :::::::::::::::::::: ;; :: diff --git a/gcc/testsuite/gcc.target/xstormy16/neghi2.c b/gcc/testsuite/gcc.target/xstormy16/neghi2.c new file mode 100644 index 0000000..dd3dd1e --- /dev/null +++ b/gcc/testsuite/gcc.target/xstormy16/neghi2.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +short neg(short x) +{ + return -x; +} +/* { dg-final { scan-assembler "not r2 | add r2,#1" } } */ diff --git a/gcc/testsuite/gcc.target/xstormy16/rotatehi-1.c b/gcc/testsuite/gcc.target/xstormy16/rotatehi-1.c new file mode 100644 index 0000000..586e7dc --- /dev/null +++ b/gcc/testsuite/gcc.target/xstormy16/rotatehi-1.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +unsigned short foo(unsigned short x) +{ + return (x << 1) | (x >> 15); +} + +/* { dg-final { scan-assembler "shl r2,#1" } } */ +/* { dg-final { scan-assembler "adc r2,#0" } } */