On Tue, Apr 11, 2023 at 06:25:58PM +0800, juzhe.zh...@rivai.ai wrote:
> Explicit sets multiple VNx1SImode with multiple dest operand and let RA to 
> assign them with continguous regsiters
> will make RTL patterns in RVV hard to maintain.

Not necessarily.  It can be handled through define_subst.

        Jakub

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