This change brings atomic stores in line with table A.6 of the ISA manual. 2023-04-05 Patrick O'Neill <patr...@rivosinc.com>
PR target/89835 * sync.md (atomic_store<mode>): Use simple store instruction in combination with a fence. * pr89835.c: New test. Signed-off-by: Patrick O'Neill <patr...@rivosinc.com> --- gcc/config/riscv/sync.md | 17 ++++++++++++----- gcc/testsuite/gcc.target/riscv/pr89835.c | 9 +++++++++ 2 files changed, 21 insertions(+), 5 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/pr89835.c diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md index b1a12545a19..cdd227721e1 100644 --- a/gcc/config/riscv/sync.md +++ b/gcc/config/riscv/sync.md @@ -53,17 +53,24 @@ ;; Atomic memory operations. -;; Implement atomic stores with amoswap. Fall back to fences for atomic loads. +;; Implement atomic stores with a leading fence. Fall back to fences for atomic loads. (define_insn "atomic_store<mode>" [(set (match_operand:GPR 0 "memory_operand" "=A") (unspec_volatile:GPR [(match_operand:GPR 1 "reg_or_0_operand" "rJ") (match_operand:SI 2 "const_int_operand")] ;; model UNSPEC_ATOMIC_STORE))] - "TARGET_ATOMIC" - "amoswap.<amo>%A2 zero,%z1,%0" - [(set_attr "type" "atomic") - (set (attr "length") (const_int 4))]) + "" + { + enum memmodel model = (enum memmodel) INTVAL (operands[2]); + model = memmodel_base (model); + if (model == MEMMODEL_SEQ_CST || model == MEMMODEL_RELEASE) + return "fence\tr,rw\;" + "s<amo>\t%z1,%0"; + else + return "s<amo>\t%z1,%0\;"; + } + [(set (attr "length") (const_int 8))]) (define_insn "atomic_<atomic_optab><mode>" [(set (match_operand:GPR 0 "memory_operand" "+A") diff --git a/gcc/testsuite/gcc.target/riscv/pr89835.c b/gcc/testsuite/gcc.target/riscv/pr89835.c new file mode 100644 index 00000000000..ab190e11b60 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/pr89835.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* Verify that relaxed atomic stores use simple store instuctions. */ +/* { dg-final { scan-assembler-not "amoswap" } } */ + +void +foo(int bar, int baz) +{ + __atomic_store_n(&bar, baz, __ATOMIC_RELAXED); +} -- 2.25.1