On Mon, Mar 27, 2023 at 03:14:26PM +0800, Kewen.Lin wrote:
> on 2023/3/27 14:16, HAO CHEN GUI wrote:
> > This patch removes byte reverse operation before vector integer sign
> > extension on Big Endian. These built-ins require to sign extend the
> > rightmost
> > element. So both BE and LE should do the same operation and the byte
> > reversion
> > is no need. This patch fixes it. Now these built-ins have the same behavior
> > on
> > all compilers. The test case is modified also.
When extending from sizes A to B the rightmost A in every B. That is
the same in every endianness, yes -- it is what the machine insns do
after all, it has nothing to do with how the elements are numbered in
the ABI :-)
> I think the whole define_expand can be removed, we can just use the
> define_insn names vsx_sign_extend_qi_* in rs6000-builtins.def (just
> like what you changed for __builtin_altivec_vsignextsw2d).
A very welcome cleanup :-)
> One interesting thing is that we used qi/hi/si in the name for
> V16QI/V8HI/V4SI but used v2di for V2DI, could you also adjust the
> names from vsx_sign_extend_{qi,hi,si}_* to ..._{v16qi,v8hi,v4si}_*
> then make them adopt the same naming style?
Yes please :-)
Segher
