> -----Original Message-----
> From: Andrea Corallo <andrea.cora...@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <kyrylo.tkac...@arm.com>; Richard Earnshaw
> <richard.earns...@arm.com>; Andrea Corallo <andrea.cora...@arm.com>
> Subject: [PATCH 07/23] arm: improve tests for vcaddq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> .../arm/mve/intrinsics/vcaddq_rot270_f16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_f32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_m_f16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot270_m_f32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot270_m_s16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot270_m_s32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot270_m_s8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot270_m_u16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot270_m_u32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot270_m_u8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot270_s16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_s32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_s8.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_u16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_u32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_u8.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_x_f16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_x_f32.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_x_s16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_x_s32.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_x_s8.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_x_u16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_x_u32.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_x_u8.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_f16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_f32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_m_f16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot90_m_f32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot90_m_s16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot90_m_s32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot90_m_s8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot90_m_u16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot90_m_u32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot90_m_u8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot90_s16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_s32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_s8.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_u16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_u32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_u8.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_x_f16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_x_f32.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_x_s16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_x_s32.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_x_s8.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_x_u16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_x_u32.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_x_u8.c | 33 ++++++++++++++++--
> 48 files changed, 1312 insertions(+), 144 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c
> index b50a5d54bb2..fb83a1cd8fc 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b)
> {
> return vcaddq_rot270_f16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b)
> {
> return vcaddq_rot270 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c
> index 0a12ff6fdcf..f8341a74e4a 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b)
> {
> return vcaddq_rot270_f32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b)
> {
> return vcaddq_rot270 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c
> index e78bbd5446c..b4e2ffda280 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m_f16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c
> index 8b53c665463..e7adc1be243 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m_f32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c
> index 61948bb3552..fdde2f56b20 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c
> index 0bbe24b3b4a..1cb6afb4e4d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c
> index e9cab3df37f..39f063970f7 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m_s8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c
> index 25c71257920..fd285288487 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m_u16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c
> index ee437eeb41f..053a61197d6 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m_u32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c
> index 419ba7e98ee..869983a0a0b 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m_u8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c
> index 832be006af8..67b0d0a4d0f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, int16x8_t b)
> {
> return vcaddq_rot270_s16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, int16x8_t b)
> {
> return vcaddq_rot270 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c
> index dbebe22183c..ab28458130e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, int32x4_t b)
> {
> return vcaddq_rot270_s32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, int32x4_t b)
> {
> return vcaddq_rot270 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c
> index 5f7852f69d4..842d6adf96d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, int8x16_t b)
> {
> return vcaddq_rot270_s8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, int8x16_t b)
> {
> return vcaddq_rot270 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c
> index 80b6c0ff3a9..97773d8daa9 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t a, uint16x8_t b)
> {
> return vcaddq_rot270_u16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t a, uint16x8_t b)
> {
> return vcaddq_rot270 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c
> index 260c5b81e22..17d5c147295 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t a, uint32x4_t b)
> {
> return vcaddq_rot270_u32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t a, uint32x4_t b)
> {
> return vcaddq_rot270 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c
> index ae9c4f436ad..faf01a18824 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t a, uint8x16_t b)
> {
> return vcaddq_rot270_u8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t a, uint8x16_t b)
> {
> return vcaddq_rot270 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c
> index 4b99c638830..f35aaf01a59 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x_f16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c
> index 2532ef7d535..6446d9edc42 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x_f32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c
> index 676efa8cfd7..b92fd2ee8aa 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x_s16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c
> index 9aa05d5bfdf..b8acc67feb9 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x_s32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c
> index 4532296494c..78ec7862574 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x_s8 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c
> index 51db9379e9b..ea781622424 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x_u16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c
> index a2e51c13268..a43d806ac3d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x_u32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c
> index 6ae7f693664..eb9cf0cffb6 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x_u8 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c
> index e1b21e6c5c3..1e78bd144b2 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b)
> {
> return vcaddq_rot90_f16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b)
> {
> return vcaddq_rot90 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c
> index 118489e923f..9611f8938dc 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b)
> {
> return vcaddq_rot90_f32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b)
> {
> return vcaddq_rot90 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c
> index e47e242f061..58608b4961e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m_f16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c
> index 833aa9c2367..125dbe5405c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m_f32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c
> index 46babedb949..38e0e47b500 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c
> index 15774e5a142..455d8388f0f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c
> index 6f2bb4da3e3..7217dadaac0 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m_s8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c
> index b9113fe4f39..d3edbaa478c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m_u16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c
> index b7fe5106414..eb1bf2a4274 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m_u32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c
> index e6c4e9f66fb..3343399b2c3 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m_u8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c
> index 8279da9ed45..134fba6280f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, int16x8_t b)
> {
> return vcaddq_rot90_s16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, int16x8_t b)
> {
> return vcaddq_rot90 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c
> index 6d59da7757d..b8e81679e9e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, int32x4_t b)
> {
> return vcaddq_rot90_s32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, int32x4_t b)
> {
> return vcaddq_rot90 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c
> index b4f5a22c03e..2a37b8e7b83 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, int8x16_t b)
> {
> return vcaddq_rot90_s8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, int8x16_t b)
> {
> return vcaddq_rot90 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c
> index e203bd017cd..51e1871b690 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t a, uint16x8_t b)
> {
> return vcaddq_rot90_u16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t a, uint16x8_t b)
> {
> return vcaddq_rot90 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c
> index 0cba5d5bda8..5905062064a 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t a, uint32x4_t b)
> {
> return vcaddq_rot90_u32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t a, uint32x4_t b)
> {
> return vcaddq_rot90 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c
> index f4f0476427a..37374637eb3 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t a, uint8x16_t b)
> {
> return vcaddq_rot90_u8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t a, uint8x16_t b)
> {
> return vcaddq_rot90 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c
> index 476648ad459..4223c4d0f33 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x_f16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c
> index ae9a196af7f..9e67c56b5e8 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x_f32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c
> index 16b5949a2a2..553fc2801fb 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x_s16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c
> index d30150e0f1c..1cd7338d162 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x_s32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c
> index fa79ce24eaf..13373d46154 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x_s8 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c
> index e18a39ed125..3f8957783e3 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x_u16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c
> index b9b95fe360e..34cb0363574 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x_u32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c
> index b8b8978c1e6..d383404052d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x_u8 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
RE: [PATCH 07/23] arm: improve tests for vcaddq*
Kyrylo Tkachov via Gcc-patches Fri, 20 Jan 2023 09:53:22 -0800
- RE: [PATCH 08/23] arm: improve tests f... Kyrylo Tkachov via Gcc-patches
- [PATCH 11/23] arm: improve tests for vqdmla... Andrea Corallo via Gcc-patches
- RE: [PATCH 11/23] arm: improve tests f... Kyrylo Tkachov via Gcc-patches
- [PATCH 19/23] arm: improve tests for vqrdml... Andrea Corallo via Gcc-patches
- RE: [PATCH 19/23] arm: improve tests f... Kyrylo Tkachov via Gcc-patches
- [PATCH 22/23] arm: improve tests for vld2q* Andrea Corallo via Gcc-patches
- RE: [PATCH 22/23] arm: improve tests f... Kyrylo Tkachov via Gcc-patches
- [PATCH 10/23] arm: improve tests and fix vq... Andrea Corallo via Gcc-patches
- RE: [PATCH 10/23] arm: improve tests a... Kyrylo Tkachov via Gcc-patches
- [PATCH 07/23] arm: improve tests for vcaddq... Andrea Corallo via Gcc-patches
- RE: [PATCH 07/23] arm: improve tests f... Kyrylo Tkachov via Gcc-patches
- [PATCH 20/23] arm: improve tests for vqrdmu... Andrea Corallo via Gcc-patches
- RE: [PATCH 20/23] arm: improve tests f... Kyrylo Tkachov via Gcc-patches
- [PATCH 14/23] arm: improve tests for vqrdml... Andrea Corallo via Gcc-patches
- RE: [PATCH 14/23] arm: improve tests f... Kyrylo Tkachov via Gcc-patches
- [PATCH 09/23] arm: improve tests for vcmulq... Andrea Corallo via Gcc-patches
- RE: [PATCH 09/23] arm: improve tests f... Kyrylo Tkachov via Gcc-patches
- [PATCH 23/23] arm: fix missing extern "... Andrea Corallo via Gcc-patches
- RE: [PATCH 23/23] arm: fix missing ext... Kyrylo Tkachov via Gcc-patches
- Re: [PATCH 23/23] arm: fix missing... Andrea Corallo via Gcc-patches
