On Fri, 2012-04-06 at 23:53 +0200, Oleg Endo wrote:
> On Fri, 2012-04-06 at 10:46 +0900, Kaz Kojima wrote:
> > From: Oleg Endo <oleg.e...@t-online.de>
> > >> Exposing three-letter macro MSW and LSW globally looks not
> > >> a good idea to me.
> > >
> > > Would 'HIGH_WORD' and 'LOW_WORD' be OK as an alternative?
> >
> > Sounds better but still a bit too generic. SH_{HIGH,LOW}_WORD
> > would be Ok, though not so cool.
> >
>
> On a second thought, it might be better to simplify those cases in
> the .md file, where low/high subregs are used by using 'gen_highpart'
> and 'gen_lowpart' for example, instead of checking the endianness over
> and over again.
> I'm trying out a couple of things...
... like the attached patch.
Tested against rev. 186216 with
make -k check RUNTESTFLAGS="--target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m2a-single/-mb,-m4/-ml,-m4/-mb,
-m4-single/-ml,-m4-single/-mb,-m4a-single/-ml,-m4a-single/-mb}"
and no new failures.
I've left the DFmode related patterns alone, because when
'gen_highpart' / 'gen_lowpart' is used to access DFmode subregs the
functions fill fail because 'sh_cannot_change_mode_class' rejects the
mode changes DFmode -> SFmode for some reason...
OK like that?
ChangeLog:
* config/sh/sh.h (SIDI_OFF): Remove.
* config/sh/sh.md: Use gen_highpart and gen_lowpart to access
DImode subregs instead of gen_rtx_REG or simplifly_gen_subreg
or operand_subword.
Index: gcc/config/sh/sh.h
===================================================================
--- gcc/config/sh/sh.h (revision 186212)
+++ gcc/config/sh/sh.h (working copy)
@@ -2387,8 +2387,6 @@
#define MAX_FIXED_MODE_SIZE (TARGET_SH5 ? 128 : 64)
-#define SIDI_OFF (TARGET_LITTLE_ENDIAN ? 0 : 4)
-
/* Better to allocate once the maximum space for outgoing args in the
prologue rather than duplicate around each call. */
#define ACCUMULATE_OUTGOING_ARGS TARGET_ACCUMULATE_OUTGOING_ARGS
Index: gcc/config/sh/sh.md
===================================================================
--- gcc/config/sh/sh.md (revision 186212)
+++ gcc/config/sh/sh.md (working copy)
@@ -940,15 +940,10 @@
(set (reg:SI T_REG) (eq:SI (match_dup 4) (match_dup 5)))
(match_dup 6)]
{
- operands[2]
- = gen_rtx_REG (SImode,
- true_regnum (operands[0]) + (TARGET_LITTLE_ENDIAN ? 1 : 0));
- operands[3]
- = (operands[1] == const0_rtx
- ? const0_rtx
- : gen_rtx_REG (SImode,
- true_regnum (operands[1])
- + (TARGET_LITTLE_ENDIAN ? 1 : 0)));
+ operands[2] = gen_highpart (SImode, operands[0]);
+ operands[3] = operands[1] == const0_rtx
+ ? const0_rtx
+ : gen_highpart (SImode, operands[1]);
operands[4] = gen_lowpart (SImode, operands[0]);
operands[5] = gen_lowpart (SImode, operands[1]);
operands[6] = gen_label_rtx ();
@@ -1451,13 +1446,10 @@
"TARGET_SH1 && reload_completed"
[(const_int 0)]
{
- rtx high0, high2, low0 = gen_lowpart (SImode, operands[0]);
- high0 = gen_rtx_REG (SImode,
- true_regnum (operands[0])
- + (TARGET_LITTLE_ENDIAN ? 1 : 0));
- high2 = gen_rtx_REG (SImode,
- true_regnum (operands[2])
- + (TARGET_LITTLE_ENDIAN ? 1 : 0));
+ rtx high0 = gen_highpart (SImode, operands[0]);
+ rtx high2 = gen_highpart (SImode, operands[2]);
+ rtx low0 = gen_lowpart (SImode, operands[0]);
+
emit_insn (gen_clrt ());
emit_insn (gen_addc (low0, low0, gen_lowpart (SImode, operands[2])));
emit_insn (gen_addc1 (high0, high0, high2));
@@ -1579,13 +1571,10 @@
"TARGET_SH1 && reload_completed"
[(const_int 0)]
{
- rtx high0, high2, low0 = gen_lowpart (SImode, operands[0]);
- high0 = gen_rtx_REG (SImode,
- true_regnum (operands[0])
- + (TARGET_LITTLE_ENDIAN ? 1 : 0));
- high2 = gen_rtx_REG (SImode,
- true_regnum (operands[2])
- + (TARGET_LITTLE_ENDIAN ? 1 : 0));
+ rtx high0 = gen_highpart (SImode, operands[0]);
+ rtx high2 = gen_highpart (SImode, operands[2]);
+ rtx low0 = gen_lowpart (SImode, operands[0]);
+
emit_insn (gen_clrt ());
emit_insn (gen_subc (low0, low0, gen_lowpart (SImode, operands[2])));
emit_insn (gen_subc1 (high0, high0, high2));
@@ -2319,7 +2308,7 @@
rtx tab_ix = operands[2];
rtx norm32 = operands[3];
rtx scratch0 = operands[4];
- rtx scratch0_si = simplify_gen_subreg (SImode, scratch0, DImode, SIDI_OFF);
+ rtx scratch0_si = gen_lowpart (SImode, scratch0);
rtx scratch1 = operands[5];
emit_insn (gen_divsi_inv_qitable (scratch0, tab_base, tab_ix));
@@ -2366,7 +2355,7 @@
rtx scratch0b = operands[6];
rtx scratch0 = operands[7];
rtx scratch1 = operands[8];
- rtx scratch1_si = simplify_gen_subreg (SImode, scratch1, DImode, SIDI_OFF);
+ rtx scratch1_si = gen_lowpart (SImode, scratch1);
emit_insn (gen_divsi_inv_m0 (inv0, tab_base, tab_ix, norm32,
scratch0a, scratch0b));
@@ -2403,7 +2392,7 @@
rtx inv1 = operands[2];
rtx i92 = operands[3];
rtx scratch0 = operands[4];
- rtx scratch0_si = simplify_gen_subreg (SImode, scratch0, DImode, SIDI_OFF);
+ rtx scratch0_si = gen_lowpart (SImode, scratch0);
emit_insn (gen_mulsidi3_media (scratch0, inv1, norm32));
emit_insn (gen_ashrdi3_media (scratch0, scratch0, GEN_INT (16)));
@@ -2516,9 +2505,9 @@
rtx i2p27 = operands[7];
rtx i43 = operands[8];
rtx scratch0 = operands[9];
- rtx scratch0_si = simplify_gen_subreg (SImode, scratch0, DImode, SIDI_OFF);
+ rtx scratch0_si = gen_lowpart (SImode, scratch0);
rtx scratch1 = operands[10];
- rtx scratch1_si = simplify_gen_subreg (SImode, scratch1, DImode, SIDI_OFF);
+ rtx scratch1_si = gen_lowpart (SImode, scratch1);
rtx scratch2 = operands[11];
rtx scratch3 = operands[12];
rtx scratch4 = operands[13];
@@ -3919,17 +3908,14 @@
(match_operand:DI 2 "const_int_operand" "n")))]
"TARGET_SH1 && INTVAL (operands[2]) < 32"
{
- int low_word = (TARGET_LITTLE_ENDIAN ? 0 : 1);
- int high_word = (TARGET_LITTLE_ENDIAN ? 1 : 0);
- rtx low_src = operand_subword (operands[1], low_word, 0, DImode);
- rtx high_src = operand_subword (operands[1], high_word, 0, DImode);
+ rtx low_src = gen_lowpart (SImode, operands[1]);
+ rtx high_src = gen_highpart (SImode, operands[1]);
rtx dst = gen_reg_rtx (DImode);
- rtx low_dst = operand_subword (dst, low_word, 1, DImode);
- rtx high_dst = operand_subword (dst, high_word, 1, DImode);
- rtx tmp0, tmp1;
+ rtx low_dst = gen_lowpart (SImode, dst);
+ rtx high_dst = gen_highpart (SImode, dst);
+ rtx tmp0 = gen_reg_rtx (SImode);
+ rtx tmp1 = gen_reg_rtx (SImode);
- tmp0 = gen_reg_rtx (SImode);
- tmp1 = gen_reg_rtx (SImode);
emit_insn (gen_lshrsi3 (tmp0, low_src, GEN_INT (32 - INTVAL (operands[2]))));
emit_insn (gen_ashlsi3 (low_dst, low_src, operands[2]));
emit_insn (gen_ashlsi3 (tmp1, high_src, operands[2]));
@@ -4373,15 +4359,11 @@
"TARGET_SH1"
[(const_int 0)]
{
- int low_word = (TARGET_LITTLE_ENDIAN ? 0 : 1);
- int high_word = (TARGET_LITTLE_ENDIAN ? 1 : 0);
+ rtx low_src = gen_lowpart (SImode, operands[1]);
+ rtx high_src = gen_highpart (SImode, operands[1]);
+ rtx low_dst = gen_lowpart (SImode, operands[0]);
+ rtx high_dst = gen_highpart (SImode, operands[0]);
- rtx low_src = operand_subword (operands[1], low_word, 0, DImode);
- rtx high_src = operand_subword (operands[1], high_word, 0, DImode);
-
- rtx low_dst = operand_subword (operands[0], low_word, 1, DImode);
- rtx high_dst = operand_subword (operands[0], high_word, 1, DImode);
-
emit_insn (gen_clrt ());
emit_insn (gen_negc (low_dst, low_src));
emit_insn (gen_negc (high_dst, high_src));
@@ -4493,8 +4475,7 @@
"&& reload_completed"
[(const_int 0)]
{
- int high_word = (TARGET_LITTLE_ENDIAN ? 1 : 0);
- rtx high_src = operand_subword (operands[1], high_word, 0, DImode);
+ rtx high_src = gen_highpart (SImode, operands[1]);
emit_insn (gen_cmpgesi_t (high_src, const0_rtx));
emit_insn (gen_negdi_cond (operands[0], operands[1], operands[1],
const1_rtx));
@@ -4509,9 +4490,7 @@
"&& reload_completed"
[(const_int 0)]
{
- int high_word = (TARGET_LITTLE_ENDIAN ? 1 : 0);
- rtx high_src = operand_subword (operands[1], high_word, 0, DImode);
-
+ rtx high_src = gen_highpart (SImode, operands[1]);
emit_insn (gen_cmpgesi_t (high_src, const0_rtx));
emit_insn (gen_negdi_cond (operands[0], operands[1], operands[1],
const0_rtx));
@@ -4529,15 +4508,11 @@
"TARGET_SH1"
[(const_int 0)]
{
- int low_word = (TARGET_LITTLE_ENDIAN ? 0 : 1);
- int high_word = (TARGET_LITTLE_ENDIAN ? 1 : 0);
+ rtx low_src = gen_lowpart (SImode, operands[1]);
+ rtx high_src = gen_highpart (SImode, operands[1]);
+ rtx low_dst = gen_lowpart (SImode, operands[0]);
+ rtx high_dst = gen_highpart (SImode, operands[0]);
- rtx low_src = operand_subword (operands[1], low_word, 0, DImode);
- rtx high_src = operand_subword (operands[1], high_word, 0, DImode);
-
- rtx low_dst = operand_subword (operands[0], low_word, 1, DImode);
- rtx high_dst = operand_subword (operands[0], high_word, 1, DImode);
-
rtx skip_neg_label = gen_label_rtx ();
emit_insn (gen_movsi (low_dst, low_src));
