Verified with qemu, committed to master, thanks!
On Thu, Oct 20, 2022 at 5:43 PM jiawei <jia...@iscas.ac.cn> wrote: > > Zfinx extension[1] had already ratified. Here is the > implementation patch set that reuse floating point pattern and ban > the use of fpr when use z*inx as a target. > > Current works can be find in follow links, binutils and simulator > works already supported on upstream. > https://github.com/pz9115/riscv-gcc/tree/zfinx-rebase > > Thanks for Tariq Kurd, Kito Cheng, Jim Willson, > Jeremy Bennett helped us a lot with this work. > > [1] https://github.com/riscv/riscv-zfinx/blob/main/zfinx-1.0.0-rc.pdf > > Version log: > > v2: As Kito Cheng's comment, add Changelog part in patches, update imply > info in riscv-common.c, remove useless check and update annotation in > riscv.c. > > v3: Update with new isa-spec version 20191213, make zfinx imply zicsr as > default, fix the lack of fcsr use in zfinx. > > v4: Rebase patch with upstream, add zhinx/zhinxmin extensions support. > Add additional zhinx/zhinxmin same like zfh/zfhmin. > > Jiawei (4): > RISC-V: Minimal support of z*inx extension. > RISC-V: Target support for z*inx extension. > RISC-V: Limit regs use for z*inx extension. > RISC-V: Add zhinx/zhinxmin testcases. > > gcc/common/config/riscv/riscv-common.cc | 18 +++++ > gcc/config/riscv/arch-canonicalize | 5 ++ > gcc/config/riscv/constraints.md | 5 +- > gcc/config/riscv/iterators.md | 6 +- > gcc/config/riscv/riscv-builtins.cc | 4 +- > gcc/config/riscv/riscv-c.cc | 2 +- > gcc/config/riscv/riscv-opts.h | 10 +++ > gcc/config/riscv/riscv.cc | 21 ++++- > gcc/config/riscv/riscv.md | 78 ++++++++++--------- > gcc/config/riscv/riscv.opt | 3 + > .../gcc.target/riscv/_Float16-zhinx-1.c | 10 +++ > .../gcc.target/riscv/_Float16-zhinx-2.c | 9 +++ > .../gcc.target/riscv/_Float16-zhinx-3.c | 9 +++ > .../gcc.target/riscv/_Float16-zhinxmin-1.c | 10 +++ > .../gcc.target/riscv/_Float16-zhinxmin-2.c | 10 +++ > .../gcc.target/riscv/_Float16-zhinxmin-3.c | 10 +++ > 16 files changed, 160 insertions(+), 50 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/riscv/_Float16-zhinx-1.c > create mode 100644 gcc/testsuite/gcc.target/riscv/_Float16-zhinx-2.c > create mode 100644 gcc/testsuite/gcc.target/riscv/_Float16-zhinx-3.c > create mode 100644 gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c > create mode 100644 gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-2.c > create mode 100644 gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-3.c > > -- > 2.25.1 >
