The change seems too large. It would be better to split it into multiple commits (for example, just 3 commits for 1,2,3 below).
On Tue, 2022-07-19 at 21:08 +0800, Lulu Cheng wrote: > 1. The original LA macro instruction is split into two instructions to > obtain the address of the symbol if enable '-mexplicit-relocs'. It's better to add some test cases (with dg-final scan-assembler) for this. The test case will also show humans the intended behavior after the change. > 3. Modify the method that calls global functions. From 'la.global + jirl' > to 'bl'. Why? Does it means we'll rely on the assembler to emit the correct sequence for -fno-plt? Then it would be better to use a pseudo mnemonic like "call" instead of "bl" (because it's not a single "bl" instruction). /* snip */ > static bool > loongarch_valid_index_p (struct loongarch_address_info *info, rtx x, > machine_mode mode, bool strict_p) > @@ -1881,6 +1978,26 @@ loongarch_classify_address (struct > loongarch_address_info *info, rtx x, > info->offset = XEXP (x, 1); > return (loongarch_valid_base_register_p (info->reg, mode, strict_p) > && loongarch_valid_offset_p (info->offset, mode)); > + > + case LO_SUM: > + info->type = ADDRESS_LO_SUM; > + info->reg = XEXP (x, 0); > + info->offset = XEXP (x, 1); > + /* We have to trust the creator of the LO_SUM to do something vaguely > + sane. Target-independent code that creates a LO_SUM should also > + create and verify the matching HIGH. Target-independent code that > + adds an offset to a LO_SUM must prove that the offset will not > + induce a carry. Failure to do either of these things would be > + a bug, and we are not required to check for it here. The MIPS Don't copy MIPS code. > +static bool loongarch_split_move_insn_p (rtx dest, rtx src); Nit: "loongarch_split_move_insn_p" shall start a new line.
