Hi!
On Tue, Jun 07, 2022 at 04:07:58PM +0800, HAO CHEN GUI wrote:
> This patch replaces shift and ior insns with one rotate and mask
> insn for the split patterns which are for DI byte swap on Power6. The
> test cases shows the optimization.
Nice :-)
> - emit_insn (gen_ashldi3 (op3, op3, GEN_INT (32)));
> - emit_insn (gen_iordi3 (dest, dest, op3));
> + emit_insn (gen_rotldi3_insert_3 (dest, op3, GEN_INT (32), dest,
> + GEN_INT (0xffffffff)));
You could make some define_expand to make this easier to use. But not
sure what to call it. The goal would be to make this easier to read and
use, not to make it harder :-) Something with duplicate-si-to-di or
such? Is that pattern somewhere else already, maybe vectors, maybe some
other target even?
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr93453-1.c
> @@ -0,0 +1,14 @@
> +/* { dg-do compile { target lp64 } } */
> +/* { dg-options "-mdejagnu-cpu=power6 -O2" } */
It doesn't require -m64, only -mpowerpc64. You can use has_arch_ppc64
to test for the latter.
Okay for trunk, even without that improvement. Thanks!
Segher
