On Fri, Jun 03, 2022 at 12:23:36PM +0200, Uros Bizjak wrote:
> I think it is better to leave the operation in its natural mode and
> leave the peephole pass to do its magic, depending on the target.

So like this?

2022-06-03  Jakub Jelinek  <ja...@redhat.com>

        PR target/105825
        * config/i386/i386.md (*ashl<dwi>3_doubleword_mask,
        *<insn><dwi>3_doubleword_mask): If top bit of mask is clear, but lower
        bits of mask aren't all set, use operands[2] mode for the AND
        operation instead of always SImode.

        * gcc.dg/pr105825.c: New test.

--- gcc/config/i386/i386.md.jj  2022-06-02 10:40:00.034660893 +0200
+++ gcc/config/i386/i386.md     2022-06-03 12:33:38.180448918 +0200
@@ -11934,8 +11934,16 @@ (define_insn_and_split "*ashl<dwi>3_doub
   if ((INTVAL (operands[3]) & ((<MODE_SIZE> * BITS_PER_UNIT) - 1))
       != ((<MODE_SIZE> * BITS_PER_UNIT) - 1))
     {
-      rtx tem = gen_reg_rtx (SImode);
-      emit_insn (gen_andsi3 (tem, operands[2], operands[3]));
+      rtx tem = gen_reg_rtx (GET_MODE (operands[2]));
+      rtx (*gen) (rtx, rtx, rtx);
+      switch (GET_MODE (operands[2]))
+       {
+       case E_HImode: gen = gen_andhi3; break;
+       case E_SImode: gen = gen_andsi3; break;
+       case E_DImode: gen = gen_anddi3; break;
+       default: gcc_unreachable ();
+       }
+      emit_insn (gen (tem, operands[2], operands[3]));
       operands[2] = tem;
     }
 
@@ -12899,8 +12907,16 @@ (define_insn_and_split "*<insn><dwi>3_do
   if ((INTVAL (operands[3]) & ((<MODE_SIZE> * BITS_PER_UNIT) - 1))
       != ((<MODE_SIZE> * BITS_PER_UNIT) - 1))
     {
-      rtx tem = gen_reg_rtx (SImode);
-      emit_insn (gen_andsi3 (tem, operands[2], operands[3]));
+      rtx tem = gen_reg_rtx (GET_MODE (operands[2]));
+      rtx (*gen) (rtx, rtx, rtx);
+      switch (GET_MODE (operands[2]))
+       {
+       case E_HImode: gen = gen_andhi3; break;
+       case E_SImode: gen = gen_andsi3; break;
+       case E_DImode: gen = gen_anddi3; break;
+       default: gcc_unreachable ();
+       }
+      emit_insn (gen (tem, operands[2], operands[3]));
       operands[2] = tem;
     }
 
--- gcc/testsuite/gcc.dg/pr105825.c.jj  2022-06-03 12:01:58.008460659 +0200
+++ gcc/testsuite/gcc.dg/pr105825.c     2022-06-03 12:01:41.259637783 +0200
@@ -0,0 +1,13 @@
+/* PR target/105825 */
+/* { dg-do compile { target int128 } } */
+/* { dg-options "-O2" } */
+/* { dg-additional-options "-mavx" { target avx } } */
+
+__int128 j;
+int i;
+
+void
+foo (void)
+{
+  j <<= __builtin_parityll (i);
+}


        Jakub

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