On Fri, May 13, 2022 at 6:35 AM Takayuki 'January June' Suwa <jjsuwa_sys3...@yahoo.co.jp> wrote: > > This patch makes bswap[sd]i2 better register allocation, and reconstructs > bswapsi2 in order to take advantage of GIMPLE manual byte-swapping > recognition. > > gcc/ChangeLog: > > * gcc/config/xtensa/xtensa.md (bswapsi2): New expansion pattern. > (bswapsi2_internal): Revise the template and condition, and add > detection code for preceding the same insn in order to omit a > "SSAI 8" instruction of the latter. > (bswapdi2): Suppress built-in insn expansion with the corresponding > library call when optimizing for size. > > gcc/testsuite/ChangeLog: > > * gcc.target/xtensa/bswap-O1.c: New. > * gcc.target/xtensa/bswap-O2.c, gcc.target/xtensa/bswap-Os.c: > Ditto. > --- > gcc/config/xtensa/xtensa.md | 77 +++++++++++++++++----- > gcc/testsuite/gcc.target/xtensa/bswap-O1.c | 37 +++++++++++ > gcc/testsuite/gcc.target/xtensa/bswap-O2.c | 37 +++++++++++ > gcc/testsuite/gcc.target/xtensa/bswap-Os.c | 37 +++++++++++ > 4 files changed, 172 insertions(+), 16 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/xtensa/bswap-O1.c > create mode 100644 gcc/testsuite/gcc.target/xtensa/bswap-O2.c > create mode 100644 gcc/testsuite/gcc.target/xtensa/bswap-Os.c
This patch breaks the test gcc.target/xtensa/bswap.c, but since it introduces three other tests that cover the same area I've dropped that test. I've regtested it for target=xtensa-linux-uclibc, there's no new regressions, but I have a question: what guarantees that no instruction that changes the SAR register can be moved between two adjacent bswapsi2_internal instructions? -- Thanks. -- Max
