Document PR102024 change (r12-7961 and 7962) for MIPS. Ok for wwwdocs?
--
htdocs/gcc-12/changes.html | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/htdocs/gcc-12/changes.html b/htdocs/gcc-12/changes.html
index 4e1f6b0f..a2d8156f 100644
--- a/htdocs/gcc-12/changes.html
+++ b/htdocs/gcc-12/changes.html
@@ -50,6 +50,10 @@ a work-in-progress.</p>
(so there is a C++ ABI incompatibility, GCC 4.4 and earlier compatible
with GCC 12 or later, incompatible with GCC 4.5 through GCC 11).
RISC-V has changed the handling of these already starting with GCC 10.
+ As the ABI requires, MIPS takes them into account handling function
+ return values so there is a C++ ABI incompatibility with GCC 4.5
+ through 11. For function arguments on MIPS, refer to
+ <a href="#mips_zero_width_fields">the MIPS specific entry</a>.
GCC 12 on the above targets will report such incompatibilities as
warnings or other diagnostics unless <code>-Wno-psabi</code> is used.
</li>
@@ -549,7 +553,18 @@ a work-in-progress.</p>
</li>
</ul>
-<!-- <h3 id="mips">MIPS</h3> -->
+<h3 id="mips">MIPS</h3>
+<ul>
+ <li>The <a name="mips_zero_width_fields">ABI</a> passing arguments
+ containing zero-width fields (for example, C/C++ zero-width
+ bit-fields, GNU C/C++ zero-length arrays, and GNU C empty structs)
+ has changed. Now a zero-width field will not prevent an aligned
+ 64-bit floating-point field next to it from being passed through
+ FPR. This is compatible with LLVM, but incompatible with previous
+ GCC releases. GCC 12 on MIPS will report such incompatibilities as
+ an inform unless <code>-Wno-psabi</code> is used.
+ </li>
+</ul>
<!-- <h3 id="mep">MeP</h3> -->
--
2.35.1
