On Sat, 2022-03-12 at 18:48 +0800, Xi Ruoyao via Gcc-patches wrote: > On Fri, 2022-03-11 at 21:26 +0000, Qing Zhao wrote: > > Hi, Ruoyao, > > > > (I might not be able to reply to this thread till next Wed due to a > > short vacation). > > > > First, some comments on opening bugs against Gcc: > > > > I took a look at the bug reports PR104817 and PR104820: > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104820 > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104817 > > > > I didn’t see a testing case and a script to repeat the error, so I > > cannot repeat the error at my side. > > I've put the test case, but maybe you didn't see it because it is too > simple: > > echo 'int t() {}' | /home/xry111/git-repos/gcc-test-mips/gcc/cc1 - > nostdinc -fzero-call-used-regs=all > > An empty function is enough to break -fzero-call-used-regs=all. And > if > you append -mips64r2 to the cc1 command line you'll get 104820. I > enabled 4 existing tests for MIPS (reported "not work" on MIPS) in the > patch so I think it's unnecessary to add new test cases. > > Richard: can we use MIPS_EPILOGUE_TEMP as a scratch register in the > sequence for zeroing the call-used registers, and then zero itself > (despite it's not in need_zeroed_hardregs)?
No, it leads to an ICE at stage 3 bootstrapping :(. Now I think the only rational ways are: (1) allow zeroing more registers than need_zeroed_hardregs. Or (2) allow zeroing less registers than need_zeroed_hardregs (then I'll skip ST_REGS, after all they are just 8 bits in total). If all these are unacceptable, then (3) I'll just call sorry in MIPS target hook to tell not to use this feature on MIPS. -- Xi Ruoyao <xry...@mengyan1223.wang> School of Aerospace Science and Technology, Xidian University
