PING**2 for the ME review or at least comments to that patch,
which fixes a build issue/ICE with nvptx (at least when bumping the
default -misa).
Patch: https://gcc.gnu.org/pipermail/gcc-patches/2022-February/590139.html
(for gcc/cfgexpand.cc + gcc/expr.cc)
(There is some discussion by Tom and Roger about the BE in the patch
thread, which only not relate to the ME patch. But there is no ME-patch
comment so far.)
Thanks,
Tobias
On 17.02.22 15:35, Tobias Burnus wrote:
PING for this cfgexpand.cc + expr.cc change by Roger.
This is a pre-requisite for Roger's nvptx patch to avoid an ICE during
bootstrap:
* https://gcc.gnu.org/pipermail/gcc-patches/2022-February/590250.html
"[PATCH] nvptx: Back-end portion of a fix for PR target/104489."
(see patch for additional reasoning for this patch)
* See also https://gcc.gnu.org/PR104489
nvptx, sm_53: internal compiler error: in gen_rtx_SUBREG, at
emit-rtl.cc:1022
Thanks,
Tobias
On 09.02.22 21:12, Roger Sayle wrote:
This patch adds middle-end support for target ABIs that pass/return
floating point values in integer registers with precision wider than
the original FP mode. An example, is the nvptx backend where 16-bit
HFmode registers are passed/returned as (promoted to) SImode registers.
Unfortunately, this currently falls foul of the various (recent?) sanity
checks that (very sensibly) prevent creating paradoxical SUBREGs of
floating point registers. The approach below is to explicitly
perform the
conversion/promotion in two steps, via an integer mode of same precision
as the floating point value. So on nvptx, 16-bit HFmode is initially
converted to 16-bit HImode (using SUBREG), then zero-extended to SImode,
and likewise when going the other way, parameters truncated to HImode
then converted to HFmode (using SUBREG). These changes are localized
to expand_value_return and expanding DECL_RTL to support strange ABIs,
rather than inside convert_modes or gen_lowpart, as mismatched
precision integer/FP conversions should be explicit in the RTL,
and these semantics not generally visible/implicit in user code.
This patch has been tested on x86_64-pc-linux-gnu with make bootstrap
and make -k check with no new failures, and on nvptx-none, where it is
the middle-end portion of a pair of patches to allow the default ISA to
be advanced. Ok for mainline?
2022-02-09 Roger Sayle <ro...@nextmovesoftware.com>
gcc/ChangeLog
* cfgexpand.cc (expand_value_return): Allow backends to promote
a scalar floating point return value to a wider integer mode.
* expr.cc (expand_expr_real_1) [expand_decl_rtl]: Likewise,
allow
backends to promote scalar FP PARM_DECLs to wider integer modes.
Thanks in advance,
Roger
--
-----------------
Siemens Electronic Design Automation GmbH; Anschrift: Arnulfstraße 201, 80634
München; Gesellschaft mit beschränkter Haftung; Geschäftsführer: Thomas
Heurung, Frank Thürauf; Sitz der Gesellschaft: München; Registergericht
München, HRB 106955