Hi,
this patch is a follow-up patch to the recent ifcvt changes. It
increased costs for a load on condition to 6. This ensures that we
if-convert sequences of three regular instructions (of cost 4) e.g. a
compare and two SETs into two loads on condition (of cost 6). With a
cost of 5, four-insn sequences (three SETs) would also be if-converted.
The adjustment to the mov[qi/si]cc expander makes sure we if-convert a
QImode/bool. Before, combine would create a paradoxical subreg itself
but need an additional insn.
Bootstrapped and regtested on s390x.
Is it OK?
Regards
Robin
--
gcc/ChangeLog:
* config/s390/s390.cc (s390_rtx_costs): Increase costs for load
on condition.
* config/s390/s390.md: Change mov[qi/si]cc expander.commit b246f96c2a2813d0e509e7916744cda07cc5131c
Author: Robin Dapp <rd...@linux.ibm.com>
Date: Fri Jun 18 10:51:22 2021 +0200
s390: Increase costs for load on condition and change movqicc expander.
diff --git a/gcc/config/s390/s390.cc b/gcc/config/s390/s390.cc
index 43c5c72554a..f2e4474df99 100644
--- a/gcc/config/s390/s390.cc
+++ b/gcc/config/s390/s390.cc
@@ -3636,7 +3636,7 @@ s390_rtx_costs (rtx x, machine_mode mode, int outer_code,
/* It is going to be a load/store on condition. Make it
slightly more expensive than a normal load. */
- *total = COSTS_N_INSNS (1) + 1;
+ *total = COSTS_N_INSNS (1) + 2;
rtx dst = SET_DEST (x);
rtx then = XEXP (SET_SRC (x), 1);
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index e3ccbac58c0..5eee8e86b42 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -7003,9 +7003,9 @@
if (!CONSTANT_P (els))
els = simplify_gen_subreg (E_SImode, els, <MODE>mode, 0);
- rtx tmp_target = gen_reg_rtx (E_SImode);
+ rtx tmp_target = simplify_gen_subreg (E_SImode, operands[0], <MODE>mode, 0);
+
emit_insn (gen_movsicc (tmp_target, operands[1], then, els));
- emit_move_insn (operands[0], gen_lowpart (<MODE>mode, tmp_target));
DONE;
})
