On Wed, Jan 19, 2022 at 7:25 PM Andre Vieira (lists) via Gcc-patches < gcc-patches@gcc.gnu.org> wrote:
> > On 13/01/2022 14:56, Christophe Lyon via Gcc-patches wrote: > > VPR_REG is the only register in its class, so it should be handled by > > TARGET_CLASS_LIKELY_SPILLED_P, which is achieved by calling > > default_class_likely_spilled_p. No test fails without this patch, but > > it seems it should be implemented. > > > > 2022-01-13 Christophe Lyon <christophe.l...@foss.st.com> > > > > gcc/ > > * config/arm/arm.c (arm_class_likely_spilled_p): Handle VPR_REG. > > > > diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c > > index c3559ca8703..64a8f2dc7de 100644 > > --- a/gcc/config/arm/arm.c > > +++ b/gcc/config/arm/arm.c > > @@ -29317,7 +29317,7 @@ arm_class_likely_spilled_p (reg_class_t rclass) > > || rclass == CC_REG) > > return true; > > > > - return false; > > + return default_class_likely_spilled_p (rclass); > > } > > > > /* Implements target hook small_register_classes_for_mode_p. */ > LGTM, but await reviewer approval. I suspect this would help avoiding > spilling of other special registers, though I'm not sure we codegen any > enough to make a difference, which is why it is likely to have no effect > on anything else. > > Yeah. I thought this had been approved at v2: https://gcc.gnu.org/pipermail/gcc-patches/2021-October/581778.html (like most other patches in the series, except the few ones I had to change v2 -> v3) Thanks, Christophe
