Hi Roger,
> This patch to the mips backend updates the representations used
> internally for MIPS' wsbh, dsbh and dshd instructions. These were
> previously described using an UNSPEC rtx, which prevents simplification
> at the RTL level. In addition to now being able to eliminate rotate
> instructions before/after wsbh, allowing a wsbh to be emitted without
> a backend builtin, these new representations also allow dsbh and dshd
> to be synthesized from standard C/C++ vector idioms.
I came across your submission and while it is not a proper review I've
noticed a couple of issues as below.
> diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
> index 455b9b8..21364d6 100644
> --- a/gcc/config/mips/mips.md
> +++ b/gcc/config/mips/mips.md
[...]
> +
> +;; Non-canonical variant of wsbh
> +(define_insn "wsbh_2"
This insn is only ever matched by its RTL pattern and is nowhere referred
to by its name, but giving it a callable one makes extra code produced to
make a call possible (via `gen_wsbh_2'). Can you prevent useless callable
code from being produced by giving the pattern a debug name instead such
as `*wsbh_2'?
> +;; V4QI form of wsbh
> +(define_insn "wsbh_v4qi"
Likewise here and throughout for other new insns.
Please note that you need a full stop at the end of sentences in comments
to comply with the GNU coding style.
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/mips/dsbh-v8qi.c
> @@ -0,0 +1,12 @@
> +/* { dg-options "isa_rev>=2 -mgp64" } */
> +
> +typedef char v8qi __attribute__((vector_size (8)));
> +
> +long long foo(long long x)
> +{
> + v8qi t = (v8qi)x;
> + t = __builtin_shufflevector (t, t, 1, 0, 3, 2, 5, 4, 7, 6);
> + return (long long)t;
> +}
> +
> +/* { dg-final { scan-assembler "\tdsbh\t" } } */
Your new test cases do not follow the GNU coding style, can you please
run them through `indent -gnu'?
Maciej
