RE: [3/3 PATCH][AArch32] use canonical ordering for complex mul, fma and fms

[Tamar Christina via Gcc-patches]

ping

> -----Original Message-----
> From: Tamar Christina
> Sent: Monday, December 20, 2021 4:22 PM
> To: gcc-patches@gcc.gnu.org
> Cc: nd <n...@arm.com>; Ramana Radhakrishnan
> <ramana.radhakrish...@arm.com>; Richard Earnshaw
> <richard.earns...@arm.com>; ni...@redhat.com; Kyrylo Tkachov
> <kyrylo.tkac...@arm.com>
> Subject: RE: [3/3 PATCH][AArch32] use canonical ordering for complex mul,
> fma and fms
> 
> Updated version of patch following AArch64 review.
> 
> Bootstrapped Regtested on arm-none-linux-gnueabihf and no issues.
> 
> Ok for master? and backport along with the first patch?
> 
> Thanks,
> Tamar
> 
> gcc/ChangeLog:
> 
>       PR tree-optimization/102819
>       PR tree-optimization/103169
>       * config/arm/vec-common.md (cml<fcmac1><conj_op><mode>4):
> Use
>       canonical order.
> 
> --- inline copy of patch ---
> 
> diff --git a/gcc/config/arm/vec-common.md b/gcc/config/arm/vec-
> common.md index
> e71d9b3811fde62159f5c21944fef9fe3f97b4bd..eab77ac8decce76d70f5b2594f
> 4439e6ed363e6e 100644
> --- a/gcc/config/arm/vec-common.md
> +++ b/gcc/config/arm/vec-common.md
> @@ -265,18 +265,18 @@ (define_expand "arm_vcmla<rot><mode>"
>  ;; remainder.  Because of this, expand early.
>  (define_expand "cml<fcmac1><conj_op><mode>4"
>    [(set (match_operand:VF 0 "register_operand")
> -     (plus:VF (match_operand:VF 1 "register_operand")
> -              (unspec:VF [(match_operand:VF 2 "register_operand")
> -                          (match_operand:VF 3 "register_operand")]
> -                         VCMLA_OP)))]
> +     (plus:VF (unspec:VF [(match_operand:VF 1 "register_operand")
> +                          (match_operand:VF 2 "register_operand")]
> +                         VCMLA_OP)
> +              (match_operand:VF 3 "register_operand")))]
>    "(TARGET_COMPLEX || (TARGET_HAVE_MVE &&
> TARGET_HAVE_MVE_FLOAT
>                     && ARM_HAVE_<MODE>_ARITH))
> && !BYTES_BIG_ENDIAN"
>  {
>    rtx tmp = gen_reg_rtx (<MODE>mode);
> -  emit_insn (gen_arm_vcmla<rotsplit1><mode> (tmp, operands[1],
> -                                          operands[3], operands[2]));
> +  emit_insn (gen_arm_vcmla<rotsplit1><mode> (tmp, operands[3],
> +                                          operands[2], operands[1]));
>    emit_insn (gen_arm_vcmla<rotsplit2><mode> (operands[0], tmp,
> -                                          operands[3], operands[2]));
> +                                          operands[2], operands[1]));
>    DONE;
>  })