On Thu, Dec 2, 2021 at 2:16 PM Andrew Pinski <pins...@gmail.com> wrote:
>
> On Tue, Oct 26, 2021 at 2:45 AM apinski--- via Gcc-patches
> <gcc-patches@gcc.gnu.org> wrote:
> >
> > From: Andrew Pinski <apin...@marvell.com>
> >
> > So the problem here is that arm_md_asm_adjust would
> > just create a set directly to the output memory which is wrong.
> > It needs to output to a temp register first and then do a
> > move.
> >
> > OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions.
> > I have no way to test on arm even though this touches common code.
>
> Ping?
Ping?
Thanks,
Andrew Pinski
>
> >
> > PR target/102941
> >
> > gcc/ChangeLog:
> >
> > * config/arm/aarch-common.c (arm_md_asm_adjust):
> > Use a temp if !REG_P.
> >
> > gcc/testsuite/ChangeLog:
> >
> > * gcc.target/aarch64/asm-flag-7.c: New test.
> > * gcc.target/arm/asm-flag-7.c: New test.
> > ---
> > gcc/config/arm/aarch-common.c | 2 +-
> > gcc/testsuite/gcc.target/aarch64/asm-flag-7.c | 22 ++++++++++++++++++
> > gcc/testsuite/gcc.target/arm/asm-flag-7.c | 23 +++++++++++++++++++
> > 3 files changed, 46 insertions(+), 1 deletion(-)
> > create mode 100644 gcc/testsuite/gcc.target/aarch64/asm-flag-7.c
> > create mode 100644 gcc/testsuite/gcc.target/arm/asm-flag-7.c
> >
> > diff --git a/gcc/config/arm/aarch-common.c b/gcc/config/arm/aarch-common.c
> > index 67343fe4025..60b3516c1df 100644
> > --- a/gcc/config/arm/aarch-common.c
> > +++ b/gcc/config/arm/aarch-common.c
> > @@ -641,7 +641,7 @@ arm_md_asm_adjust (vec<rtx> &outputs, vec<rtx> &
> > /*inputs*/,
> > rtx x = gen_rtx_REG (mode, CC_REGNUM);
> > x = gen_rtx_fmt_ee (code, word_mode, x, const0_rtx);
> >
> > - if (dest_mode == word_mode)
> > + if (dest_mode == word_mode && REG_P (dest))
> > emit_insn (gen_rtx_SET (dest, x));
> > else
> > {
> > diff --git a/gcc/testsuite/gcc.target/aarch64/asm-flag-7.c
> > b/gcc/testsuite/gcc.target/aarch64/asm-flag-7.c
> > new file mode 100644
> > index 00000000000..6c31b854b0b
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/aarch64/asm-flag-7.c
> > @@ -0,0 +1,22 @@
> > +/* Test that "=@cc*" works with MEM_P RTX */
> > +/* PR target/102941 */
> > +/* { dg-do compile } */
> > +/* { dg-options "-O" } */
> > +
> > +#ifndef __GCC_ASM_FLAG_OUTPUTS__
> > +#error "missing preprocessor define"
> > +#endif
> > +int test_cmpu_x;
> > +
> > +void f(long *);
> > +long
> > +test_cmpu_y() {
> > + long le;
> > + f(&le);
> > + __asm__("cmp %"
> > + "[x], %"
> > + "[y]"
> > + : "=@ccls"(le)
> > + : [x] ""(test_cmpu_x), [y] ""(test_cmpu_y));
> > + return le;
> > +}
> > diff --git a/gcc/testsuite/gcc.target/arm/asm-flag-7.c
> > b/gcc/testsuite/gcc.target/arm/asm-flag-7.c
> > new file mode 100644
> > index 00000000000..ac11da0a3a8
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/arm/asm-flag-7.c
> > @@ -0,0 +1,23 @@
> > +/* Test that "=@cc*" works with MEM_P RTX */
> > +/* PR target/102941 */
> > +/* { dg-do compile } */
> > +/* { dg-options "-O" } */
> > +/* { dg-skip-if "" { arm_thumb1 } } */
> > +
> > +#ifndef __GCC_ASM_FLAG_OUTPUTS__
> > +#error "missing preprocessor define"
> > +#endif
> > +int test_cmpu_x;
> > +
> > +void f(long *);
> > +long
> > +test_cmpu_y() {
> > + long le;
> > + f(&le);
> > + __asm__("cmp %"
> > + "[x], %"
> > + "[y]"
> > + : "=@ccls"(le)
> > + : [x] ""(test_cmpu_x), [y] ""(test_cmpu_y));
> > + return le;
> > +}
> > --
> > 2.17.1
> >
