On 9/17/21 5:41 PM, Roger Sayle wrote: > > This patch adds upon my previous patch to prototype HFmode support on > nvptx, which includes adding new target macros TARGET_SM75 and TARGET_SM80.
I've mode those parts into this patch. > Tobias Burnus has questioned "whether it makes sense to add those > flags if no use is made of those flags". I had hoped that it might > be possible to split these patch submissions into smaller parts to > assist the review process, but failing that, here's part 2, that > adds support for __builtin_tanhf, HFmode exp2/tanh and also > for HFmode min/max, controlled by TARGET_SM75 and TARGET_SM80 respectively. > > The following has been tested on nvptx-none, hosted on x86_64-pc-linux-gnu > (on top of my previous patch) with a "make" and "make -k check" with no > new failures. Please ignore the hunks in the git diff that were described > in the previous patch (hopefully I'll be able to resume submitting > patches sequentially in future). Are both parts Ok for mainline? > > Committed. I've used mptx=7.0 in the test-cases, since that's required. That doesn't become apparent though unless dg-do assemble is used instead of dg-do compile, but I've left that as is for now. To deal with this properly will require adding some required target testing of what is supported by ptxas, and then choosing between dg-do assemble and compile based on what is supported, and that all looks involved enough to treat as a separate issue. Thanks, - Tom > 2020-09-17 Roger Sayle <ro...@nextmovesoftware.com> > > gcc/ChangeLog > * config/nvptx/nvptx.md (define_c_enum "unspec"): New UNSPEC_TANH. > (define_mode_iterator HSFM): New iterator for HFmode and SFmode. > (exp2hf2): New define_insn controlled by TARGET_SM75. > (tanh<mode>2): New define_insn controlled by TARGET_SM75. > (sminhf3, smaxhf3): New define_isnns controlled by TARGET_SM80. > > gcc/testsuite/ChangeLog > * gcc.target/nvptx/float16-2.c: New test case. > * gcc.target/nvptx/tanh-1.c: New test case. > > Roger > -- > > > -----Original Message----- > From: Tobias Burnus <tob...@codesourcery.com> > Sent: 17 September 2021 09:25 > To: Roger Sayle <ro...@nextmovesoftware.com>; 'GCC Patches' > <gcc-patches@gcc.gnu.org>; Tom de Vries <tdevr...@suse.de> > Subject: Re: [PATCH] nvptx: Add (experimental) support for HFmode with > -misa=sm_53 > > Hi Roger, > > some more generic remarks not specific to using new ISA features. > > On 17.09.21 00:53, Roger Sayle wrote: > >> Whilst there I also added -misa=sm_75 and -misa=sm_80 which are points >> where other useful instructions were added to the ISA. > > First, my impression was that already sm_70 added lots of useful stuff, but > granted sm_75 adds some more. In any case, the question is whether it makes > sense to add those flags if no use is made of those flags. > > In particular, sm_80 is according to the following webpage only supported > with PTX ISA 7.0 of CUDA 11.0. But GCC currently only supports > -mptx=3.6 (default) and -mptx=6.3 (= CUDA 10). > https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#release-no > tes > > Note that you missed to update gcc/config/nvptx/t-omp-device for the new > sm_* and likewise the "-misa=@var{ISA-string}" section in > gcc/gcc/doc/invoke.texi. > > Additionally, I wonder whether the preprocessor macros __nvptx__, > __nvptx_softstack__, __nvptx_unisimt__ and __PTX_SM__ should be documented > somewhere as well. As all but one are related to command-line options, I > wonder whether the respective section in invoke.texi would be a good place > for them. > > Tobias > > ----------------- > Siemens Electronic Design Automation GmbH; Anschrift: Arnulfstraße 201, > 80634 München; Gesellschaft mit beschränkter Haftung; Geschäftsführer: > Thomas Heurung, Frank Thürauf; Sitz der Gesellschaft: München; > Registergericht München, HRB 106955 >
