[PATCH] middle-end/102682 - avoid invalid subreg on the LHS

[Richard Biener via Gcc-patches]

The following avoids generating

(insn 6 5 7 2 (set (subreg:OI (concatn/v:TI [
                    (reg:DI 92 [ buffer ])
                    (reg:DI 93 [ buffer+8 ])
                ]) 0)
        (subreg:OI (reg/v:V8SI 85 [ __x ]) 0)) "t.ii":76:21 74 
{*movoi_internal_avx}
     (nil))

via store_bit_field_1 when we try to store excess data into
a register allocated temporary.  The case was supposed to

      /* Use the subreg machinery either to narrow OP0 to the required
         words...

but the check ensured only an register-aligned but not a large
enough piece.  The following adds such missed check which ends up
decomposing the set to

(insn 6 5 7 (set (subreg:DI (reg/v:TI 84 [ buffer ]) 0)
        (subreg:DI (reg/v:V8SI 85 [ __x ]) 0)) "t.ii":76:21 -1
     (nil))

(insn 7 6 0 (set (subreg:DI (reg/v:TI 84 [ buffer ]) 8)
        (subreg:DI (reg/v:V8SI 85 [ __x ]) 8)) "t.ii":76:21 -1
     (nil))


Bootstrapped and tested on x86_64-unknown-linux-gnu, OK for trunk?

Thanks,
Richard.

2021-10-11  Richard Biener  <rguent...@suse.de>

        PR middle-end/102682
        * expmed.c (store_bit_field_1): Ensure a LHS subreg would
        not create a paradoxical subreg.
---
 gcc/expmed.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/expmed.c b/gcc/expmed.c
index 59734d4841c..bbdd0e71d20 100644
--- a/gcc/expmed.c
+++ b/gcc/expmed.c
@@ -806,7 +806,8 @@ store_bit_field_1 (rtx str_rtx, poly_uint64 bitsize, 
poly_uint64 bitnum,
            }
        }
       else if (constant_multiple_p (bitnum, regsize * BITS_PER_UNIT, &regnum)
-              && multiple_p (bitsize, regsize * BITS_PER_UNIT))
+              && multiple_p (bitsize, regsize * BITS_PER_UNIT)
+              && known_ge (GET_MODE_BITSIZE (GET_MODE (op0)), bitsize))
        {
          sub = simplify_gen_subreg (fieldmode, op0, GET_MODE (op0),
                                     regnum * regsize);
-- 
2.31.1