Jonathan Wright <jonathan.wri...@arm.com> writes:
> Hi,
>
> Some scan-assembler tests for SVE code generation were erroneously
> split over multiple lines - meaning they became invalid. This patch
> gets the tests working again by putting each test on a single line.
>
> The extract_[1234].c tests are corrected to expect that extracted
> 32-bit values are moved into 'w' registers rather than 'x' registers.
>
> Ok for master?
>
> Thanks,
> Jonathan
>
> ---
>
> gcc/testsuite/ChangeLog:
>
> 2021-08-06 Jonathan Wright <jonathan.wri...@arm.com>
>
> * gcc.target/aarch64/sve/dup_lane_1.c: Don't split
> scan-assembler tests over multiple lines. Expect 32-bit
> result values in 'w' registers.
> * gcc.target/aarch64/sve/extract_1.c: Likewise.
> * gcc.target/aarch64/sve/extract_2.c: Likewise.
> * gcc.target/aarch64/sve/extract_3.c: Likewise.
> * gcc.target/aarch64/sve/extract_4.c: Likewise.
OK, thanks.
Richard
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/dup_lane_1.c
> b/gcc/testsuite/gcc.target/aarch64/sve/dup_lane_1.c
> index
> 14c1f5ab4c2de84bf923eae5ae26e1bdd81cd6ef..39b46daaae26744af786a989b52c56e4e2b908c3
> 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/dup_lane_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/dup_lane_1.c
> @@ -56,27 +56,19 @@ TEST_ALL (DUP_LANE)
>
> /* { dg-final { scan-assembler-not {\ttbl\t} } } */
>
> -/* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.d, d[0-9]} 2 {
> - target { aarch64_little_endian } } } } */
> -/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.d, z[0-9]+\.d\[0\]} 2 {
> - target { aarch64_big_endian } } } } */
> +/* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.d, d[0-9]} 2 { target
> aarch64_little_endian } } } */
> +/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.d, z[0-9]+\.d\[0\]} 2
> { target aarch64_big_endian } } } */
> /* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.d, z[0-9]+\.d\[2\]} 2
> } } */
> /* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.d, z[0-9]+\.d\[3\]} 2
> } } */
> -/* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.s, s[0-9]} 2 {
> - target { aarch64_little_endian } } } } */
> -/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.s, z[0-9]+\.s\[0\]} 2 {
> - target { aarch64_big_endian } } } } */
> +/* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.s, s[0-9]} 2 { target
> aarch64_little_endian } } } */
> +/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.s, z[0-9]+\.s\[0\]} 2
> { target aarch64_big_endian } } } */
> /* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.s, z[0-9]+\.s\[5\]} 2
> } } */
> /* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.s, z[0-9]+\.s\[7\]} 2
> } } */
> -/* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.h, h[0-9]} 2 {
> - target { aarch64_little_endian } } } } */
> -/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.h, z[0-9]+\.h\[0\]} 2 {
> - target { aarch64_big_endian } } } } */
> +/* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.h, h[0-9]} 2 { target
> aarch64_little_endian } } } */
> +/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.h, z[0-9]+\.h\[0\]} 2
> { target aarch64_big_endian } } } */
> /* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.h, z[0-9]+\.h\[6\]} 2
> } } */
> /* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.h, z[0-9]+\.h\[15\]} 2
> } } */
> -/* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.b, b[0-9]} 1 {
> - target { aarch64_little_endian } } } } */
> -/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.b, z[0-9]+\.b\[0\]} 1 {
> - target { aarch64_big_endian } } } } */
> +/* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.b, b[0-9]} 1 { target
> aarch64_little_endian } } } */
> +/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.b, z[0-9]+\.b\[0\]} 1
> { target aarch64_big_endian } } } */
> /* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.b, z[0-9]+\.b\[19\]} 1
> } } */
> /* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.b, z[0-9]+\.b\[31\]} 1
> } } */
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/extract_1.c
> b/gcc/testsuite/gcc.target/aarch64/sve/extract_1.c
> index
> 7d76c98e92545817f6544d1b131cdbbd800c46ab..dbcc1d943e1b29f5dd0482c442146394931828a4
> 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/extract_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/extract_1.c
> @@ -56,10 +56,8 @@ typedef _Float16 vnx8hf __attribute__((vector_size (32)));
>
> TEST_ALL (EXTRACT)
>
> -/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, d[0-9]\n} 2 {
> - target { aarch64_little_endian } } } } */
> -/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[0\]\n} 1 {
> - target { aarch64_big_endian } } } } */
> +/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, d[0-9]\n} 2 { target
> aarch64_little_endian } } } */
> +/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[0\]\n} 1
> { target aarch64_big_endian } } } */
> /* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[1\]\n} 1
> } } */
> /* { dg-final { scan-assembler-not {\tdup\td[0-9]+, v[0-9]+\.d\[0\]\n} } } */
> /* { dg-final { scan-assembler-times {\tdup\td[0-9]+, v[0-9]+\.d\[1\]\n} 1 }
> } */
> @@ -67,10 +65,8 @@ TEST_ALL (EXTRACT)
> /* { dg-final { scan-assembler-times {\tlastb\tx[0-9]+, p[0-7],
> z[0-9]+\.d\n} 1 } } */
> /* { dg-final { scan-assembler-times {\tlastb\td[0-9]+, p[0-7],
> z[0-9]+\.d\n} 1 } } */
>
> -/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, s[0-9]\n} 2 {
> - target { aarch64_little_endian } } } } */
> -/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.s\[0\]\n} 1 {
> - target { aarch64_big_endian } } } } */
> +/* { dg-final { scan-assembler-times {\tfmov\tw[0-9]+, s[0-9]\n} 2 { target
> aarch64_little_endian } } } */
> +/* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[0\]\n} 1
> { target aarch64_big_endian } } } */
> /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[1\]\n} 1
> } } */
> /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[3\]\n} 1
> } } */
> /* { dg-final { scan-assembler-not {\tdup\ts[0-9]+, v[0-9]+\.s\[0\]\n} } } */
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/extract_2.c
> b/gcc/testsuite/gcc.target/aarch64/sve/extract_2.c
> index
> a2644ceae68235175ff787d1d9cbece83985dc5f..a48774664dd270a96da755ac5f8be22fc6680b30
> 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/extract_2.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/extract_2.c
> @@ -56,10 +56,8 @@ typedef _Float16 vnx16hf __attribute__((vector_size (64)));
>
> TEST_ALL (EXTRACT)
>
> -/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, d[0-9]\n} 2 {
> - target { aarch64_little_endian } } } } */
> -/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[0\]\n} 1 {
> - target { aarch64_big_endian } } } } */
> +/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, d[0-9]\n} 2 { target
> aarch64_little_endian } } } */
> +/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[0\]\n} 1
> { target aarch64_big_endian } } } */
> /* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[1\]\n} 1
> } } */
> /* { dg-final { scan-assembler-not {\tdup\td[0-9]+, v[0-9]+\.d\[0\]\n} } } */
> /* { dg-final { scan-assembler-times {\tdup\td[0-9]+, v[0-9]+\.d\[1\]\n} 1 }
> } */
> @@ -67,10 +65,8 @@ TEST_ALL (EXTRACT)
> /* { dg-final { scan-assembler-times {\tlastb\tx[0-9]+, p[0-7],
> z[0-9]+\.d\n} 1 } } */
> /* { dg-final { scan-assembler-times {\tlastb\td[0-9]+, p[0-7],
> z[0-9]+\.d\n} 1 } } */
>
> -/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, s[0-9]\n} 2 {
> - target { aarch64_little_endian } } } } */
> -/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.s\[0\]\n} 1 {
> - target { aarch64_big_endian } } } } */
> +/* { dg-final { scan-assembler-times {\tfmov\tw[0-9]+, s[0-9]\n} 2 { target
> aarch64_little_endian } } } */
> +/* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[0\]\n} 1
> { target aarch64_big_endian } } } */
> /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[1\]\n} 1
> } } */
> /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[3\]\n} 1
> } } */
> /* { dg-final { scan-assembler-not {\tdup\ts[0-9]+, v[0-9]+\.s\[0\]\n} } } */
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/extract_3.c
> b/gcc/testsuite/gcc.target/aarch64/sve/extract_3.c
> index
> baa54594c482253b1e0aae2b62a342edea0369e9..bf10bf16efd9452269f219b5daa29b720d50532e
> 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/extract_3.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/extract_3.c
> @@ -77,10 +77,8 @@ typedef _Float16 vnx32hf __attribute__((vector_size
> (128)));
>
> TEST_ALL (EXTRACT)
>
> -/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, d[0-9]\n} 5 {
> - target { aarch64_little_endian } } } } */
> -/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[0\]\n} 1 {
> - target { aarch64_big_endian } } } } */
> +/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, d[0-9]\n} 5 { target
> aarch64_little_endian } } } */
> +/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[0\]\n} 1
> { target aarch64_big_endian } } } */
> /* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[1\]\n} 1
> } } */
> /* { dg-final { scan-assembler-not {\tdup\td[0-9]+, v[0-9]+\.d\[0\]\n} } } */
> /* { dg-final { scan-assembler-times {\tdup\td[0-9]+, v[0-9]+\.d\[1\]\n} 1 }
> } */
> @@ -89,10 +87,8 @@ TEST_ALL (EXTRACT)
> /* { dg-final { scan-assembler-times {\tlastb\tx[0-9]+, p[0-7],
> z[0-9]+\.d\n} 1 } } */
> /* { dg-final { scan-assembler-times {\tlastb\td[0-9]+, p[0-7],
> z[0-9]+\.d\n} 1 } } */
>
> -/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, s[0-9]\n} 5 {
> - target { aarch64_little_endian } } } } */
> -/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.s\[0\]\n} 1 {
> - target { aarch64_big_endian } } } } */
> +/* { dg-final { scan-assembler-times {\tfmov\tw[0-9]+, s[0-9]\n} 5 { target
> aarch64_little_endian } } } */
> +/* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[0\]\n} 1
> { target aarch64_big_endian } } } */
> /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[1\]\n} 1
> } } */
> /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[3\]\n} 1
> } } */
> /* { dg-final { scan-assembler-not {\tdup\ts[0-9]+, v[0-9]+\.s\[0\]\n} } } */
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/extract_4.c
> b/gcc/testsuite/gcc.target/aarch64/sve/extract_4.c
> index
> aa6fe482dbfdc3b2fa54473523cc0efd467a64de..9805678c12ee7d2ba1af0faf0e0c46a72f14d5cd
> 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/extract_4.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/extract_4.c
> @@ -84,10 +84,8 @@ typedef _Float16 v128hf __attribute__((vector_size (256)));
>
> TEST_ALL (EXTRACT)
>
> -/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, d[0-9]\n} 6 {
> - target { aarch64_little_endian } } } } */
> -/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[0\]\n} 1 {
> - target { aarch64_big_endian } } } } */
> +/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, d[0-9]\n} 6 { target
> aarch64_little_endian } } } */
> +/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[0\]\n} 1
> { target aarch64_big_endian } } } */
> /* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[1\]\n} 1
> } } */
> /* { dg-final { scan-assembler-not {\tdup\td[0-9]+, v[0-9]+\.d\[0\]\n} } } */
> /* { dg-final { scan-assembler-times {\tdup\td[0-9]+, v[0-9]+\.d\[1\]\n} 1 }
> } */
> @@ -96,10 +94,8 @@ TEST_ALL (EXTRACT)
> /* { dg-final { scan-assembler-times {\tlastb\tx[0-9]+, p[0-7],
> z[0-9]+\.d\n} 1 } } */
> /* { dg-final { scan-assembler-times {\tlastb\td[0-9]+, p[0-7],
> z[0-9]+\.d\n} 1 } } */
>
> -/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, s[0-9]\n} 6 {
> - target { aarch64_little_endian } } } } */
> -/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.s\[0\]\n} 1 {
> - target { aarch64_big_endian } } } } */
> +/* { dg-final { scan-assembler-times {\tfmov\tw[0-9]+, s[0-9]\n} 6 { target
> aarch64_little_endian } } } */
> +/* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[0\]\n} 1
> { target aarch64_big_endian } } } */
> /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[1\]\n} 1
> } } */
> /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[3\]\n} 1
> } } */
> /* { dg-final { scan-assembler-not {\tdup\ts[0-9]+, v[0-9]+\.s\[0\]\n} } } */
