[PATCH, rs6000] Add additional checks when identifying load/store instructions

[Pat Haugen via Gcc-patches]

Add additional checks to verify destination[source] of a load[store]
instruction is a register.

Bootstrap/regtest on powerpc64le with no new regressions. Ok for master?

-Pat


2021-08-06  Pat Haugen  <pthau...@linux.ibm.com>

gcc/ChangeLog:

        * config/rs6000/rs6000.c: (is_load_insn1): Verify destination is a
        register.
        (is_store_insn1): Verify source is a register.


diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 279f00cc648..1460a0d7c5c 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -18357,7 +18361,7 @@ is_load_insn1 (rtx pat, rtx *load_mem)
   if (!pat || pat == NULL_RTX)
     return false;
 
-  if (GET_CODE (pat) == SET)
+  if (GET_CODE (pat) == SET && REG_P (SET_DEST (pat)))
     return find_mem_ref (SET_SRC (pat), load_mem);
 
   if (GET_CODE (pat) == PARALLEL)
@@ -18394,7 +18398,8 @@ is_store_insn1 (rtx pat, rtx *str_mem)
   if (!pat || pat == NULL_RTX)
     return false;
 
-  if (GET_CODE (pat) == SET)
+  if (GET_CODE (pat) == SET
+      && (REG_P (SET_SRC (pat)) || SUBREG_P (SET_SRC (pat))))
     return find_mem_ref (SET_DEST (pat), str_mem);
 
   if (GET_CODE (pat) == PARALLEL)