On Thu, 22 Jul 2021, Liu, Hongtao wrote: > > > >-----Original Message----- > >From: Uros Bizjak <ubiz...@gmail.com> > >Sent: Wednesday, July 21, 2021 4:23 PM > >To: Hongtao Liu <crazy...@gmail.com> > >Cc: Liu, Hongtao <hongtao....@intel.com>; gcc-patches@gcc.gnu.org; H. J. Lu > ><hjl.to...@gmail.com>; Richard Biener <rguent...@suse.de> > >Subject: Re: [PATCH] Support logic shift left/right for avx512 mask type. > > > >On Wed, Jul 21, 2021 at 5:05 AM Hongtao Liu <crazy...@gmail.com> wrote: > >> > >> On Tue, Jul 20, 2021 at 9:41 PM Uros Bizjak <ubiz...@gmail.com> wrote: > >> > > >> > On Tue, Jul 20, 2021 at 2:33 PM liuhongt <hongtao....@intel.com> wrote: > >> > > > >> > > Hi: > >> > > As mention in > >> > > https://gcc.gnu.org/pipermail/gcc-patches/2021-July/575420.html > >> > > > >> > > ----cut start----- > >> > > > note for the lowpart we can just view-convert away the excess > >> > > > bits, fully re-using the mask. We generate surprisingly "good" code: > >> > > > > >> > > > kmovb %k1, %edi > >> > > > shrb $4, %dil > >> > > > kmovb %edi, %k2 > >> > > > > >> > > > besides the lack of using kshiftrb. I guess we're just lacking > >> > > > a mask register alternative for > >> > > Yes, we can do it similar as kor/kand/kxor. > >> > > ---cut end-------- > >> > > > >> > > Bootstrap and regtested on x86_64-linux-gnu{-m32,}. > >> > > Ok for trunk? > >> > > > >> > > gcc/ChangeLog: > >> > > > >> > > * config/i386/constraints.md (Wb): New constraint. > >> > > (Ww): Ditto. > >> > > * config/i386/i386.md (*ashlhi3_1): Extend to avx512 mask > >> > > shift. > >> > > (*ashlqi3_1): Ditto. > >> > > (*<insn><mode>3_1): Ditto. > >> > > (*<insn><mode>3_1): Ditto. > >> > > * config/i386/sse.md (k<code><mode>): New define_split after > >> > > it to convert generic shift pattern to mask shift ones. > >> > > > >> > > gcc/testsuite/ChangeLog: > >> > > > >> > > * gcc.target/i386/mask-shift.c: New test. > > > > > >+(define_insn "*lshr<mode>3_1" > >+ [(set (match_operand:SWI12 0 "nonimmediate_operand" "=<r>m, ?k") > >+ (lshiftrt:SWI12 > >+ (match_operand:SWI12 1 "nonimmediate_operand" "0, k") > >+ (match_operand:QI 2 "nonmemory_operand" "c<S>, <KS>"))) > >+ (clobber (reg:CC FLAGS_REG))] > >+ "ix86_binary_operator_ok (LSHIFTRT, <MODE>mode, operands)" > > > >Also split this one to QImode and HImode to avoid conditions in isa > >attribute. > > > >OK with this change. > > > > Thanks for the review, here's the patch I'm check in.
Works with my experimental patches, thanks! Richard.
