Hi Kyrill,
I assume this patch is OK to commit after bootstrap+testing ?
Thanks,
Prathamesh
diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h
index f42a15f7912..41b596b5fc6 100644
--- a/gcc/config/arm/arm_neon.h
+++ b/gcc/config/arm/arm_neon.h
@@ -8384,21 +8384,25 @@ __extension__ extern __inline float32x2_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vmul_n_f32 (float32x2_t __a, float32_t __b)
{
+#ifdef __FAST_MATH__
+ return __a * __b;
+#else
return (float32x2_t)__builtin_neon_vmul_nv2sf (__a, (__builtin_neon_sf) __b);
+#endif
}
__extension__ extern __inline uint16x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vmul_n_u16 (uint16x4_t __a, uint16_t __b)
{
- return (uint16x4_t)__builtin_neon_vmul_nv4hi ((int16x4_t) __a,
(__builtin_neon_hi) __b);
+ return __a * __b;
}
__extension__ extern __inline uint32x2_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vmul_n_u32 (uint32x2_t __a, uint32_t __b)
{
- return (uint32x2_t)__builtin_neon_vmul_nv2si ((int32x2_t) __a,
(__builtin_neon_si) __b);
+ return __a * __b;
}
__extension__ extern __inline int16x8_t
@@ -8419,21 +8423,25 @@ __extension__ extern __inline float32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vmulq_n_f32 (float32x4_t __a, float32_t __b)
{
+#ifdef __FAST_MATH__
+ return __a * __b;
+#else
return (float32x4_t)__builtin_neon_vmul_nv4sf (__a, (__builtin_neon_sf) __b);
+#endif
}
__extension__ extern __inline uint16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vmulq_n_u16 (uint16x8_t __a, uint16_t __b)
{
- return (uint16x8_t)__builtin_neon_vmul_nv8hi ((int16x8_t) __a,
(__builtin_neon_hi) __b);
+ return __a * __b;
}
__extension__ extern __inline uint32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vmulq_n_u32 (uint32x4_t __a, uint32_t __b)
{
- return (uint32x4_t)__builtin_neon_vmul_nv4si ((int32x4_t) __a,
(__builtin_neon_si) __b);
+ return __a * __b;
}
__extension__ extern __inline int32x4_t
@@ -17740,7 +17748,11 @@ __extension__ extern __inline float16x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vmul_n_f16 (float16x4_t __a, float16_t __b)
{
+#ifdef __FAST_MATH__
+ return __a * __b;
+#else
return __builtin_neon_vmul_nv4hf (__a, __b);
+#endif
}
__extension__ extern __inline float16x8_t
@@ -17765,7 +17777,11 @@ __extension__ extern __inline float16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vmulq_n_f16 (float16x8_t __a, float16_t __b)
{
+#ifdef __FAST_MATH__
+ return __a * __b;
+#else
return __builtin_neon_vmul_nv8hf (__a, __b);
+#endif
}
__extension__ extern __inline float16x4_t
diff --git a/gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-2.c
b/gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-2.c
index 50f689352ca..6808576ce59 100644
--- a/gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-2.c
+++ b/gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-2.c
@@ -327,13 +327,13 @@ BINOP_TEST (vminnm)
BINOP_TEST (vmul)
/* { dg-final { scan-assembler-times {vmul\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 3
} }
- { dg-final { scan-assembler-times {vmul\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1
} } */
+ { dg-final { scan-assembler-times {vmul\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 2
} } */
BINOP_LANE_TEST (vmul, 2)
/* { dg-final { scan-assembler-times {vmul\.f16\td[0-9]+, d[0-9]+,
d[0-9]+\[2\]} 1 } }
{ dg-final { scan-assembler-times {vmul\.f16\tq[0-9]+, q[0-9]+,
d[0-9]+\[2\]} 1 } } */
BINOP_N_TEST (vmul)
-/* { dg-final { scan-assembler-times {vmul\.f16\td[0-9]+, d[0-9]+,
d[0-9]+\[0\]} 1 } }
- { dg-final { scan-assembler-times {vmul\.f16\tq[0-9]+, q[0-9]+,
d[0-9]+\[0\]} 1 } }*/
+/* { dg-final { scan-assembler-times {vmul\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 3
} }
+ { dg-final { scan-assembler-times {vmul\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 2
} }*/
float16x4_t
test_vpadd_16x4 (float16x4_t a, float16x4_t b)
@@ -387,7 +387,7 @@ test_vdup_n_f16 (float16_t a)
{
return vdup_n_f16 (a);
}
-/* { dg-final { scan-assembler-times {vdup\.16\td[0-9]+, r[0-9]+} 2 } } */
+/* { dg-final { scan-assembler-times {vdup\.16\td[0-9]+, r[0-9]+} 3 } } */
float16x8_t
test_vmovq_n_f16 (float16_t a)
@@ -400,7 +400,7 @@ test_vdupq_n_f16 (float16_t a)
{
return vdupq_n_f16 (a);
}
-/* { dg-final { scan-assembler-times {vdup\.16\tq[0-9]+, r[0-9]+} 2 } } */
+/* { dg-final { scan-assembler-times {vdup\.16\tq[0-9]+, r[0-9]+} 3 } } */
float16x4_t
test_vdup_lane_f16 (float16x4_t a)
