Hi! On Thu, Jun 17, 2021 at 03:18:48PM -0400, Michael Meissner wrote: > > The actual insns only check TARGET_POWER10 (so no TARGET_FLOAT128_HW). > > Which is right, this or that? > > It should include TARGET_FLOAT128_HW.
Okay, so fix that :-) > The problem area is a power10 running in > big endian mode and running 32-bit code. Because we don't have TImode, we > can't enable the IEEE 128-bit hardware instructions. I don't see why not? > > > +/* { dg-require-effective-target ppc_float128_hw } */ > > > +/* { dg-require-effective-target power10_ok } */ > > > +/* { dg-options "-mdejagnu-cpu=power10 -O2 -ffast-math" } */ > > > > In testcases we can assume that float128_hw is set whenever we have a > > p10; we don't manually disable it to make live hard for ourselves ;-) > > Again, I put it in case somebody builds a BE power10 compiler. This should still be fixed. And yes, people do test BE p10, of course. And BE p10 *should* enable the QP float insns. Does it not currently? Segher