Jonathan Wright <jonathan.wri...@arm.com> writes:
> Hi,
>
> As subject, this patch uses UNSPEC_SQXTUN instead of UNSPEC_SQXTUN2
> in the aarch64_sqxtun2<mode> patterns. This allows for more more
> aggressive combinations and ultimately better code generation - which will
> be confirmed by a new set of tests in
> gcc.target/aarch64/narrow_high_combine.c (patch 5/5 in this series.)
>
> The now redundant UNSPEC_SQXTUN2 is removed.
>
> Regression tested and bootstrapped on aarch64-none-linux-gnu - no
> issues.
OK, thanks.
Richard
> Ok for master?
>
> Thanks,
> Jonathan
>
> ---
>
> gcc/ChangeLog:
>
> 2021-05-14 Jonathn Wright <jonathan.wri...@arm.com>
>
> * config/aarch64/aarch64-simd.md: Use UNSPEC_SQXTUN instead
> of UNSPEC_SQXTUN2.
> * config/aarch64/iterators.md: Remove UNSPEC_SQXTUN2.
>
> diff --git a/gcc/config/aarch64/aarch64-simd.md
> b/gcc/config/aarch64/aarch64-simd.md
> index
> 2a836e8f9a4dfe11d645d439b19ac4487d9fb1a8..fa6c2d81cf3b6939a8eb4a4f471ac2398a60e115
> 100644
> --- a/gcc/config/aarch64/aarch64-simd.md
> +++ b/gcc/config/aarch64/aarch64-simd.md
> @@ -4859,7 +4859,7 @@
> (vec_concat:<VNARROWQ2>
> (match_operand:<VNARROWQ> 1 "register_operand" "0")
> (unspec:<VNARROWQ>
> - [(match_operand:VQN 2 "register_operand" "w")] UNSPEC_SQXTUN2)))]
> + [(match_operand:VQN 2 "register_operand" "w")] UNSPEC_SQXTUN)))]
> "TARGET_SIMD && !BYTES_BIG_ENDIAN"
> "sqxtun2\\t%0.<V2ntype>, %2.<Vtype>"
> [(set_attr "type" "neon_sat_shift_imm_narrow_q")]
> @@ -4869,7 +4869,7 @@
> [(set (match_operand:<VNARROWQ2> 0 "register_operand" "=w")
> (vec_concat:<VNARROWQ2>
> (unspec:<VNARROWQ>
> - [(match_operand:VQN 2 "register_operand" "w")] UNSPEC_SQXTUN2)
> + [(match_operand:VQN 2 "register_operand" "w")] UNSPEC_SQXTUN)
> (match_operand:<VNARROWQ> 1 "register_operand" "0")))]
> "TARGET_SIMD && BYTES_BIG_ENDIAN"
> "sqxtun2\\t%0.<V2ntype>, %2.<Vtype>"
> @@ -4880,7 +4880,7 @@
> [(match_operand:<VNARROWQ2> 0 "register_operand")
> (match_operand:<VNARROWQ> 1 "register_operand")
> (unspec:<VNARROWQ>
> - [(match_operand:VQN 2 "register_operand")] UNSPEC_SQXTUN2)]
> + [(match_operand:VQN 2 "register_operand")] UNSPEC_SQXTUN)]
> "TARGET_SIMD"
> {
> if (BYTES_BIG_ENDIAN)
> diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md
> index
> d13f54a32465619110d7d014fdfe8aaf22384189..96eaef9c749927394465bfe445f509807bfdc57c
> 100644
> --- a/gcc/config/aarch64/iterators.md
> +++ b/gcc/config/aarch64/iterators.md
> @@ -521,7 +521,6 @@
> UNSPEC_USQADD ; Used in aarch64-simd.md.
> UNSPEC_SUQADD ; Used in aarch64-simd.md.
> UNSPEC_SQXTUN ; Used in aarch64-simd.md.
> - UNSPEC_SQXTUN2 ; Used in aarch64-simd.md.
> UNSPEC_SSRA ; Used in aarch64-simd.md.
> UNSPEC_USRA ; Used in aarch64-simd.md.
> UNSPEC_SRSRA ; Used in aarch64-simd.md.
