> A quick look through the code suggests it's being used for thumb1 code > gen to try to reproduce the traditional CC0 type behaviour of > eliminating redundant compare operations when you have sequences such as > > cmp a, b > b<cond1> d1 > cmp a, b > b<cond2> d2 > > The second compare operation can be eliminated. > > It might be possible to eliminate this another way by reworking the > thumb1 codegen to expose the condition codes after register allocation > has completed (much like x86 does these days), but that would be quite a > lot of work right now. I don't know if such splitting would directly > lead to the ability to remove the redundant compares - it might need a > new pass to spot them.
Do you mean in addition to the existing pass_compare_elim_after_reload? -- Eric Botcazou
