ping?
On Wed, 21 Apr 2021 at 22:48, Christophe Lyon
<christophe.l...@linaro.org> wrote:
>
> The acle/saturation.c test uses __[su]sat() and
> __saturation_occurred() intrinsics but __[su]sat() are defined in
> acle.h if __ARM_FEATURE_SAT true, while __saturation_occurred()
> depends on __ARM_FEATURE_QBIT.
>
> QBIT is a v5te feature, while SAT is available since v6, so the test
> really needs __ARM_FEATURE_SAT, to have both available.
>
> This patch renames arm_qbit_ok into arm_sat_ok and checks
> __ARM_FEATURE_SAT. It updates acle/saturation.c accordingly.
>
> This enables the test to pass on arm-eabi with default cpu/fpu/mode,
> where arm_qbit previously used -march=armv5te instead of armv6 now.
>
> 2021-04-22 Christophe Lyon <christophe.l...@linaro.org>
>
> gcc/
> * doc/sourcebuild.texi (arm_qbit_ok): Rename into...
> (arm_sat_ok): ...this.
>
> gcc/testsuite/
> * gcc.target/arm/acle/saturation.c: Use arm_sat_ok effective
> target.
> * lib/target-supports.exp
> (check_effective_target_arm_qbit_ok_nocache): Rename into...
> (check_effective_target_arm_sat_ok_nocache): ... this. Check
> __ARM_FEATURE_SAT and use armv6.
> ---
> gcc/doc/sourcebuild.texi | 6 ++--
> gcc/testsuite/gcc.target/arm/acle/saturation.c | 4 +--
> gcc/testsuite/lib/target-supports.exp | 42
> +++++++++++++-------------
> 3 files changed, 26 insertions(+), 26 deletions(-)
>
> diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
> index b5bdd4f..4d9ec3c 100644
> --- a/gcc/doc/sourcebuild.texi
> +++ b/gcc/doc/sourcebuild.texi
> @@ -2041,9 +2041,9 @@ ARM Target supports options suitable for accessing the
> SIMD32 intrinsics from
> @code{arm_acle.h}.
> Some multilibs may be incompatible with these options.
>
> -@item arm_qbit_ok
> -@anchor{arm_qbit_ok}
> -ARM Target supports options suitable for accessing the Q-bit manipulation
> +@item arm_sat_ok
> +@anchor{arm_sat_ok}
> +ARM Target supports options suitable for accessing the saturation
> intrinsics from @code{arm_acle.h}.
> Some multilibs may be incompatible with these options.
>
> diff --git a/gcc/testsuite/gcc.target/arm/acle/saturation.c
> b/gcc/testsuite/gcc.target/arm/acle/saturation.c
> index 0b3fe51..a9f99e5 100644
> --- a/gcc/testsuite/gcc.target/arm/acle/saturation.c
> +++ b/gcc/testsuite/gcc.target/arm/acle/saturation.c
> @@ -1,6 +1,6 @@
> /* { dg-do compile } */
> -/* { dg-require-effective-target arm_qbit_ok } */
> -/* { dg-add-options arm_qbit } */
> +/* { dg-require-effective-target arm_sat_ok } */
> +/* { dg-add-options arm_sat } */
>
> #include <arm_acle.h>
>
> diff --git a/gcc/testsuite/lib/target-supports.exp
> b/gcc/testsuite/lib/target-supports.exp
> index a522da3..5fab170 100644
> --- a/gcc/testsuite/lib/target-supports.exp
> +++ b/gcc/testsuite/lib/target-supports.exp
> @@ -4168,24 +4168,24 @@ proc add_options_for_arm_simd32 { flags } {
> return "$flags $et_arm_simd32_flags"
> }
>
> -# Return 1 if this is an ARM target supporting the saturation intrinsics
> -# from arm_acle.h. Some multilibs may be incompatible with these options.
> -# Also set et_arm_qbit_flags to the best options to add.
> -# arm_acle.h includes stdint.h which can cause trouble with incompatible
> -# -mfloat-abi= options.
> -
> -proc check_effective_target_arm_qbit_ok_nocache { } {
> - global et_arm_qbit_flags
> - set et_arm_qbit_flags ""
> - foreach flags {"" "-march=armv5te" "-march=armv5te -mfloat-abi=softfp"
> "-march=armv5te -mfloat-abi=hard"} {
> - if { [check_no_compiler_messages_nocache et_arm_qbit_flags object {
> +# Return 1 if this is an ARM target supporting the __ssat and __usat
> +# saturation intrinsics from arm_acle.h. Some multilibs may be
> +# incompatible with these options. Also set et_arm_sat_flags to the
> +# best options to add. arm_acle.h includes stdint.h which can cause
> +# trouble with incompatible -mfloat-abi= options.
> +
> +proc check_effective_target_arm_sat_ok_nocache { } {
> + global et_arm_sat_flags
> + set et_arm_sat_flags ""
> + foreach flags {"" "-march=armv6" "-march=armv6 -mfloat-abi=softfp"
> "-march=armv6 -mfloat-abi=hard -mfpu=vfp"} {
> + if { [check_no_compiler_messages_nocache et_arm_sat_flags object {
> #include <arm_acle.h>
> int dummy;
> - #ifndef __ARM_FEATURE_QBIT
> - #error not QBIT
> + #ifndef __ARM_FEATURE_SAT
> + #error not SAT
> #endif
> } "$flags"] } {
> - set et_arm_qbit_flags $flags
> + set et_arm_sat_flags $flags
> return 1
> }
> }
> @@ -4193,17 +4193,17 @@ proc check_effective_target_arm_qbit_ok_nocache { } {
> return 0
> }
>
> -proc check_effective_target_arm_qbit_ok { } {
> - return [check_cached_effective_target et_arm_qbit_flags \
> - check_effective_target_arm_qbit_ok_nocache]
> +proc check_effective_target_arm_sat_ok { } {
> + return [check_cached_effective_target et_arm_sat_flags \
> + check_effective_target_arm_sat_ok_nocache]
> }
>
> -proc add_options_for_arm_qbit { flags } {
> - if { ! [check_effective_target_arm_qbit_ok] } {
> +proc add_options_for_arm_sat { flags } {
> + if { ! [check_effective_target_arm_sat_ok] } {
> return "$flags"
> }
> - global et_arm_qbit_flags
> - return "$flags $et_arm_qbit_flags"
> + global et_arm_sat_flags
> + return "$flags $et_arm_sat_flags"
> }
>
> # Return 1 if this is an ARM target supporting the DSP intrinsics from
> --
> 2.7.4
>
