On Wed, Apr 28, 2021 at 3:32 PM Richard Biener <rguent...@suse.de> wrote:
>
> On Wed, 28 Apr 2021, Uros Bizjak wrote:
>
> > On Wed, Apr 28, 2021 at 1:46 PM Richard Biener <rguent...@suse.de> wrote:
> > >
> > > On Wed, 28 Apr 2021, Uros Bizjak wrote:
> > >
> > > > On Wed, Apr 28, 2021 at 1:02 PM Richard Biener <rguent...@suse.de>
> > > > wrote:
> > > > >
> > > > > This arranges for the x86 AVX and AVX2 masked load builtins to be
> > > > > pure to enable dead code elimination and more appropriate alias
> > > > > analysis.
> > > > >
> > > > > Bootstrapped and tested on x86_64-unknown-linux-gnu. OK for trunk?
> > > > >
> > > > > Thanks,
> > > > > Richard.
> > > > >
> > > > > 2021-04-28 Richard Biener <rguent...@suse.de>
> > > > >
> > > > > PR target/100312
> > > > > * config/i386/i386-builtin.def (IX86_BUILTIN_MASKLOADPD,
> > > > > IX86_BUILTIN_MASKLOADPS, IX86_BUILTIN_MASKLOADPD256,
> > > > > IX86_BUILTIN_MASKLOADPS256, IX86_BUILTIN_MASKLOADD,
> > > > > IX86_BUILTIN_MASKLOADQ, IX86_BUILTIN_MASKLOADD256,
> > > > > IX86_BUILTIN_MASKLOADQ256): Remove.
> > > > > * config/i386/i386-builtins.h (ix86_builtins): Add entries for
> > > > > IX86_BUILTIN_MASKLOADPD, IX86_BUILTIN_MASKLOADPS,
> > > > > IX86_BUILTIN_MASKLOADPD256, IX86_BUILTIN_MASKLOADPS256,
> > > > > IX86_BUILTIN_MASKLOADD, IX86_BUILTIN_MASKLOADQ,
> > > > > IX86_BUILTIN_MASKLOADD256, and IX86_BUILTIN_MASKLOADQ256.
> > > > > * config/i386/i386-builtins.c (ix86_init_mmx_sse_builtins):
> > > > > Initialize IX86_BUILTIN_MASKLOADPD, IX86_BUILTIN_MASKLOADPS,
> > > > > IX86_BUILTIN_MASKLOADPD256, IX86_BUILTIN_MASKLOADPS256,
> > > > > IX86_BUILTIN_MASKLOADD, IX86_BUILTIN_MASKLOADQ,
> > > > > IX86_BUILTIN_MASKLOADD256, and IX86_BUILTIN_MASKLOADQ256
> > > > > as pure builtins.
> > > >
> > > > OK.
> > >
> > > Whoops - somehow I posted the wrong version. The version posted
> > > ICEs because I failed to realize I'd have to explicitely handle
> > > those builtins in ix86_expand_builtin. What bootstrapped and
> > > tested OK is the version below.
> > >
> > > Is that version also OK?
> >
> > Hm, your previous version removed mentioned builtins from builtins.def
> > and initialized them in ix86_init_mmx_sse_builtins by hand (this seems
> > to be the preferred way). This should work, so I really don't see why
> > the previous approach would result in ICE.
>
> It eventually runs into the gcc_unreachable () at the very end of
> ix86_expand_builtin since IX86_BUILTIN_MASKLOADD and friends are
> no longer in the range of IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST
> to IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST.
How about the attached (untested) patch then?
Uros.
diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def
index 4dbd4f23647..80c2a2c0294 100644
--- a/gcc/config/i386/i386-builtin.def
+++ b/gcc/config/i386/i386-builtin.def
@@ -187,10 +187,6 @@ BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_movntv4di,
"__builtin_ia32_movntdq25
BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_movntv4df,
"__builtin_ia32_movntpd256", IX86_BUILTIN_MOVNTPD256, UNKNOWN, (int)
VOID_FTYPE_PDOUBLE_V4DF)
BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_movntv8sf,
"__builtin_ia32_movntps256", IX86_BUILTIN_MOVNTPS256, UNKNOWN, (int)
VOID_FTYPE_PFLOAT_V8SF)
-BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_maskloadpd,
"__builtin_ia32_maskloadpd", IX86_BUILTIN_MASKLOADPD, UNKNOWN, (int)
V2DF_FTYPE_PCV2DF_V2DI)
-BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_maskloadps,
"__builtin_ia32_maskloadps", IX86_BUILTIN_MASKLOADPS, UNKNOWN, (int)
V4SF_FTYPE_PCV4SF_V4SI)
-BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_maskloadpd256,
"__builtin_ia32_maskloadpd256", IX86_BUILTIN_MASKLOADPD256, UNKNOWN, (int)
V4DF_FTYPE_PCV4DF_V4DI)
-BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_maskloadps256,
"__builtin_ia32_maskloadps256", IX86_BUILTIN_MASKLOADPS256, UNKNOWN, (int)
V8SF_FTYPE_PCV8SF_V8SI)
BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_maskstorepd,
"__builtin_ia32_maskstorepd", IX86_BUILTIN_MASKSTOREPD, UNKNOWN, (int)
VOID_FTYPE_PV2DF_V2DI_V2DF)
BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_maskstoreps,
"__builtin_ia32_maskstoreps", IX86_BUILTIN_MASKSTOREPS, UNKNOWN, (int)
VOID_FTYPE_PV4SF_V4SI_V4SF)
BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_maskstorepd256,
"__builtin_ia32_maskstorepd256", IX86_BUILTIN_MASKSTOREPD256, UNKNOWN, (int)
VOID_FTYPE_PV4DF_V4DI_V4DF)
@@ -198,10 +194,6 @@ BDESC (OPTION_MASK_ISA_AVX, 0,
CODE_FOR_avx_maskstoreps256, "__builtin_ia32_mask
/* AVX2 */
BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_movntdqa,
"__builtin_ia32_movntdqa256", IX86_BUILTIN_MOVNTDQA256, UNKNOWN, (int)
V4DI_FTYPE_PV4DI)
-BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_maskloadd,
"__builtin_ia32_maskloadd", IX86_BUILTIN_MASKLOADD, UNKNOWN, (int)
V4SI_FTYPE_PCV4SI_V4SI)
-BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_maskloadq,
"__builtin_ia32_maskloadq", IX86_BUILTIN_MASKLOADQ, UNKNOWN, (int)
V2DI_FTYPE_PCV2DI_V2DI)
-BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_maskloadd256,
"__builtin_ia32_maskloadd256", IX86_BUILTIN_MASKLOADD256, UNKNOWN, (int)
V8SI_FTYPE_PCV8SI_V8SI)
-BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_maskloadq256,
"__builtin_ia32_maskloadq256", IX86_BUILTIN_MASKLOADQ256, UNKNOWN, (int)
V4DI_FTYPE_PCV4DI_V4DI)
BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_maskstored,
"__builtin_ia32_maskstored", IX86_BUILTIN_MASKSTORED, UNKNOWN, (int)
VOID_FTYPE_PV4SI_V4SI_V4SI)
BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_maskstoreq,
"__builtin_ia32_maskstoreq", IX86_BUILTIN_MASKSTOREQ, UNKNOWN, (int)
VOID_FTYPE_PV2DI_V2DI_V2DI)
BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_maskstored256,
"__builtin_ia32_maskstored256", IX86_BUILTIN_MASKSTORED256, UNKNOWN, (int)
VOID_FTYPE_PV8SI_V8SI_V8SI)
@@ -473,7 +465,22 @@ BDESC (0, OPTION_MASK_ISA2_WIDEKL, CODE_FOR_nothing,
"__builtin_ia32_aesdecwide2
BDESC (0, OPTION_MASK_ISA2_WIDEKL, CODE_FOR_nothing,
"__builtin_ia32_aesencwide128kl_u8", IX86_BUILTIN_AESENCWIDE128KLU8, UNKNOWN,
(int) UINT8_FTYPE_PV2DI_PCV2DI_PCVOID)
BDESC (0, OPTION_MASK_ISA2_WIDEKL, CODE_FOR_nothing,
"__builtin_ia32_aesencwide256kl_u8", IX86_BUILTIN_AESENCWIDE256KLU8, UNKNOWN,
(int) UINT8_FTYPE_PV2DI_PCV2DI_PCVOID)
-BDESC_END (SPECIAL_ARGS, ARGS)
+BDESC_END (SPECIAL_ARGS, PURE_ARGS)
+
+/* AVX */
+BDESC_FIRST (pure_args, PURE_ARGS,
+ OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_maskloadpd,
"__builtin_ia32_maskloadpd", IX86_BUILTIN_MASKLOADPD, UNKNOWN, (int)
V2DF_FTYPE_PCV2DF_V2DI)
+BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_maskloadps,
"__builtin_ia32_maskloadps", IX86_BUILTIN_MASKLOADPS, UNKNOWN, (int)
V4SF_FTYPE_PCV4SF_V4SI)
+BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_maskloadpd256,
"__builtin_ia32_maskloadpd256", IX86_BUILTIN_MASKLOADPD256, UNKNOWN, (int)
V4DF_FTYPE_PCV4DF_V4DI)
+BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_maskloadps256,
"__builtin_ia32_maskloadps256", IX86_BUILTIN_MASKLOADPS256, UNKNOWN, (int)
V8SF_FTYPE_PCV8SF_V8SI)
+
+/* AVX2 */
+BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_maskloadd,
"__builtin_ia32_maskloadd", IX86_BUILTIN_MASKLOADD, UNKNOWN, (int)
V4SI_FTYPE_PCV4SI_V4SI)
+BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_maskloadq,
"__builtin_ia32_maskloadq", IX86_BUILTIN_MASKLOADQ, UNKNOWN, (int)
V2DI_FTYPE_PCV2DI_V2DI)
+BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_maskloadd256,
"__builtin_ia32_maskloadd256", IX86_BUILTIN_MASKLOADD256, UNKNOWN, (int)
V8SI_FTYPE_PCV8SI_V8SI)
+BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_maskloadq256,
"__builtin_ia32_maskloadq256", IX86_BUILTIN_MASKLOADQ256, UNKNOWN, (int)
V4DI_FTYPE_PCV4DI_V4DI)
+
+BDESC_END (PURE_ARGS, ARGS)
/* Builtins with variable number of arguments. */
BDESC_FIRST (args, ARGS,
diff --git a/gcc/config/i386/i386-builtins.c b/gcc/config/i386/i386-builtins.c
index 128bd39816c..b66911082ab 100644
--- a/gcc/config/i386/i386-builtins.c
+++ b/gcc/config/i386/i386-builtins.c
@@ -108,8 +108,10 @@ BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPISTR_FIRST,
IX86_BUILTIN__BDESC_PCMPESTR_LAST, 1);
BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST,
IX86_BUILTIN__BDESC_PCMPISTR_LAST, 1);
-BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS_FIRST,
+BDESC_VERIFYS (IX86_BUILTIN__BDESC_PURE_ARGS_FIRST,
IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST, 1);
+BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS_FIRST,
+ IX86_BUILTIN__BDESC_PURE_ARGS_LAST, 1);
BDESC_VERIFYS (IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST,
IX86_BUILTIN__BDESC_ARGS_LAST, 1);
BDESC_VERIFYS (IX86_BUILTIN__BDESC_MULTI_ARG_FIRST,
@@ -527,7 +529,23 @@ ix86_init_mmx_sse_builtins (void)
IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST,
ARRAY_SIZE (bdesc_special_args) - 1);
- /* Add all builtins with variable number of operands. */
+ /* Add all pure builtins with variable number of operands. */
+ for (i = 0, d = bdesc_pure_args;
+ i < ARRAY_SIZE (bdesc_pure_args);
+ i++, d++)
+ {
+ BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_PURE_ARGS_FIRST, i);
+ if (d->name == 0)
+ continue;
+
+ ftype = (enum ix86_builtin_func_type) d->flag;
+ def_builtin_pure (d->mask, d->mask2, d->name, ftype, d->code);
+ }
+ BDESC_VERIFYS (IX86_BUILTIN__BDESC_PURE_ARGS_LAST,
+ IX86_BUILTIN__BDESC_PURE_ARGS_FIRST,
+ ARRAY_SIZE (bdesc_pure_args) - 1);
+
+ /* Add all const builtins with variable number of operands. */
for (i = 0, d = bdesc_args;
i < ARRAY_SIZE (bdesc_args);
i++, d++)
diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c
index 516440eb5c1..76990628150 100644
--- a/gcc/config/i386/i386-expand.c
+++ b/gcc/config/i386/i386-expand.c
@@ -13240,6 +13240,14 @@ rdseed_step:
target);
}
+ if (fcode >= IX86_BUILTIN__BDESC_PURE_ARGS_FIRST
+ && fcode <= IX86_BUILTIN__BDESC_PURE_ARGS_LAST)
+ {
+ i = fcode - IX86_BUILTIN__BDESC_PURE_ARGS_FIRST;
+ return ix86_expand_special_args_builtin (bdesc_pure_args + i, exp,
+ target);
+ }
+
if (fcode >= IX86_BUILTIN__BDESC_ARGS_FIRST
&& fcode <= IX86_BUILTIN__BDESC_ARGS_LAST)
{
