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On Mon, 29 Mar 2021 at 11:01, Christophe Lyon
<christophe.l...@linaro.org> wrote:
>
> The previous change to this testcase missed the fact that the data may
> be accessed via an anchor, depending on the optimization level,
> leading to false failures.
>
> This patch restricts matching to upper16:lower16 followed by
> non-spaces, followed by +4 (in f4) or +320 (in f5).
>
> Using '.*' instead of '[^ \]' would match accross the whole assembly
> file, which is not what we want, hence the limitation with spaces.
>
> 2021-03-29  Christophe Lyon  <christophe.l...@linaro.org>
>
>         gcc/testsuite/
>         PR target/96770
>         * gcc.target/arm/pure-code/pr96770.c: Fix scan-assembler-times
>         with movt/movw.
> ---
>  gcc/testsuite/gcc.target/arm/pure-code/pr96770.c | 12 +++++++-----
>  1 file changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/pure-code/pr96770.c 
> b/gcc/testsuite/gcc.target/arm/pure-code/pr96770.c
> index ae1bd10..3c69614 100644
> --- a/gcc/testsuite/gcc.target/arm/pure-code/pr96770.c
> +++ b/gcc/testsuite/gcc.target/arm/pure-code/pr96770.c
> @@ -4,12 +4,13 @@
>  int arr[1000];
>  int *f4 (void) { return &arr[1]; }
>
> -/* For cortex-m0 (thumb-1/v6m), we generate 4 movs with upper/lower:#arr+4.  
> */
> +/* For cortex-m0 (thumb-1/v6m), we generate 2 pairs of movs/adds with 
> upper/lower:#arr+4.  */
>  /* { dg-final { scan-assembler-times "arr\\+4" 4 { target { { ! 
> arm_thumb1_movt_ok } && { ! arm_thumb2_ok } } } } } */
>
>  /* For cortex-m with movt/movw (thumb-1/v8m.base or thumb-2), we
> -   generate a movt/movw pair with upper/lower:#arr+4.  */
> -/* { dg-final { scan-assembler-times "arr\\+4" 2 { target { 
> arm_thumb1_movt_ok || arm_thumb2_ok } } } } */
> +   generate a movt/movw pair with upper/lower:#arr+4 possibly via an anchor. 
>  */
> +/* { dg-final { scan-assembler-times "upper16:\[^ \]+.\\+4" 1 { target { 
> arm_thumb1_movt_ok || arm_thumb2_ok } } } } */
> +/* { dg-final { scan-assembler-times "lower16:\[^ \]+\\+4" 1 { target { 
> arm_thumb1_movt_ok || arm_thumb2_ok } } } } */
>
>  int *f5 (void) { return &arr[80]; }
>
> @@ -17,5 +18,6 @@ int *f5 (void) { return &arr[80]; }
>  /* { dg-final { scan-assembler-times "arr\\+320" 1 { target { { ! 
> arm_thumb1_movt_ok } && { ! arm_thumb2_ok } } } } } */
>
>  /* For cortex-m with movt/movw (thumb-1/v8m.base or thumb-2), we
> -   generate a movt/movw pair with upper/lower:arr+320.  */
> -/* { dg-final { scan-assembler-times "arr\\+320" 2 { target { 
> arm_thumb1_movt_ok || arm_thumb2_ok } } } } */
> +   generate a movt/movw pair with upper/lower:arr+320 possibly via an 
> anchor.  */
> +/* { dg-final { scan-assembler-times "upper16:\[^ \]+\\+320" 1 { target { 
> arm_thumb1_movt_ok || arm_thumb2_ok } } } } */
> +/* { dg-final { scan-assembler-times "lower16:\[^ \]+\\+320" 1 { target { 
> arm_thumb1_movt_ok || arm_thumb2_ok } } } } */
> --
> 2.7.4
>

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