These tests pass with their current dg-add-options, no need to force
-mfloat=abi.
I've noticed no impact on armv8_1m-shift-imm-1.c and
armv8_1m-shift-reg-1.c, bf16_reinterpret.c now passes on
arm-linux-gnueabi and bf16_dup.c now passes on arm-linux-gnueabihf.
This allows pr51534.c to pass when forcing -mfloat-abi=soft in
runtestflags, otherwise we get an error '-mfloat-abi=soft and
-mfloat-abi=hard may not be used together' because we try to compile
with both flags.
2021-03-19 Christophe Lyon <christophe.l...@linaro.org>
gcc/testsuite/
* gcc.target/arm/armv8_1m-shift-imm-1.c: Remove -mfloat=abi option.
* gcc.target/arm/armv8_1m-shift-reg-1.c: Likewise.
* gcc.target/arm/bf16_dup.c: Likewise.
* gcc.target/arm/bf16_reinterpret.c: Likewise.
* gcc.target/arm/pr51534.c: Remove -mfloat=abi option.
---
gcc/testsuite/gcc.target/arm/armv8_1m-shift-imm-1.c | 2 +-
gcc/testsuite/gcc.target/arm/armv8_1m-shift-reg-1.c | 2 +-
gcc/testsuite/gcc.target/arm/bf16_dup.c | 2 +-
gcc/testsuite/gcc.target/arm/bf16_reinterpret.c | 2 +-
gcc/testsuite/gcc.target/arm/pr51534.c | 2 +-
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/armv8_1m-shift-imm-1.c
b/gcc/testsuite/gcc.target/arm/armv8_1m-shift-imm-1.c
index 883fbb09..84f13e2 100644
--- a/gcc/testsuite/gcc.target/arm/armv8_1m-shift-imm-1.c
+++ b/gcc/testsuite/gcc.target/arm/armv8_1m-shift-imm-1.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -mfloat-abi=softfp -mlittle-endian" } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-options "-O2 -mlittle-endian" } */
/* { dg-add-options arm_v8_1m_mve } */
long long longval1;
diff --git a/gcc/testsuite/gcc.target/arm/armv8_1m-shift-reg-1.c
b/gcc/testsuite/gcc.target/arm/armv8_1m-shift-reg-1.c
index e125ff8..8668b6b 100644
--- a/gcc/testsuite/gcc.target/arm/armv8_1m-shift-reg-1.c
+++ b/gcc/testsuite/gcc.target/arm/armv8_1m-shift-reg-1.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -mfloat-abi=softfp -mlittle-endian" } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-options "-O2 -mlittle-endian" } */
/* { dg-add-options arm_v8_1m_mve } */
long long longval2;
diff --git a/gcc/testsuite/gcc.target/arm/bf16_dup.c
b/gcc/testsuite/gcc.target/arm/bf16_dup.c
index 94be99a..b62bce1 100644
--- a/gcc/testsuite/gcc.target/arm/bf16_dup.c
+++ b/gcc/testsuite/gcc.target/arm/bf16_dup.c
@@ -1,7 +1,7 @@
/* { dg-do assemble { target { arm*-*-* } } } */
/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
/* { dg-add-options arm_v8_2a_bf16_neon } */
-/* { dg-additional-options "-save-temps -march=armv8.2-a+bf16+fp16
-mfloat-abi=softfp" } */
+/* { dg-additional-options "-save-temps -march=armv8.2-a+bf16+fp16" } */
#include "arm_neon.h"
diff --git a/gcc/testsuite/gcc.target/arm/bf16_reinterpret.c
b/gcc/testsuite/gcc.target/arm/bf16_reinterpret.c
index e7d30a9..9e36fc5 100644
--- a/gcc/testsuite/gcc.target/arm/bf16_reinterpret.c
+++ b/gcc/testsuite/gcc.target/arm/bf16_reinterpret.c
@@ -1,7 +1,7 @@
/* { dg-do assemble { target { arm*-*-* } } } */
/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
/* { dg-add-options arm_v8_2a_bf16_neon } */
-/* { dg-additional-options "-save-temps -march=armv8.2-a+fp16+bf16
-mfloat-abi=hard -mfpu=crypto-neon-fp-armv8" } */
+/* { dg-additional-options "-save-temps -march=armv8.2-a+fp16+bf16
-mfpu=crypto-neon-fp-armv8" } */
#include <arm_neon.h>
diff --git a/gcc/testsuite/gcc.target/arm/pr51534.c
b/gcc/testsuite/gcc.target/arm/pr51534.c
index f675a44..3711b45 100644
--- a/gcc/testsuite/gcc.target/arm/pr51534.c
+++ b/gcc/testsuite/gcc.target/arm/pr51534.c
@@ -3,7 +3,7 @@
/* { dg-do assemble } */
/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -mfloat-abi=hard -O3" } */
+/* { dg-options "-save-temps -O3" } */
/* { dg-add-options arm_neon } */
#include <arm_neon.h>
--
2.7.4
