For MIPSr6, we may wish to use compact-branches only.
Currently, we have to use `always' option, while it is mark as conflict
with pre-R6.
  cc1: error: unsupported combination: ‘mips32r2’ -mcompact-branches=always
Just ignore -mcompact-branches=always for pre-R6.

This patch also defines
    __mips_compact_branches_never
    __mips_compact_branches_always
    __mips_compact_branches_optimal
predefined macros
---
 gcc/config/mips/mips.c                        |  8 +------
 gcc/config/mips/mips.h                        | 22 ++++++++++++-------
 gcc/doc/invoke.texi                           |  1 +
 .../gcc.target/mips/compact-branches-1.c      |  2 +-
 .../gcc.target/mips/compact-branches-8.c      | 10 +++++++++
 .../gcc.target/mips/compact-branches-9.c      | 10 +++++++++
 gcc/testsuite/gcc.target/mips/mips.exp        |  4 +---
 7 files changed, 38 insertions(+), 19 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/mips/compact-branches-8.c
 create mode 100644 gcc/testsuite/gcc.target/mips/compact-branches-9.c

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 8bd2d29552e..9a75dd61031 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -20107,13 +20107,7 @@ mips_option_override (void)
       target_flags |= MASK_ODD_SPREG;
     }
 
-  if (!ISA_HAS_COMPACT_BRANCHES && mips_cb == MIPS_CB_ALWAYS)
-    {
-      error ("unsupported combination: %qs%s %s",
-             mips_arch_info->name, TARGET_MICROMIPS ? " -mmicromips" : "",
-             "-mcompact-branches=always");
-    }
-  else if (!ISA_HAS_DELAY_SLOTS && mips_cb == MIPS_CB_NEVER)
+  if (!ISA_HAS_DELAY_SLOTS && mips_cb == MIPS_CB_NEVER)
     {
       error ("unsupported combination: %qs%s %s",
              mips_arch_info->name, TARGET_MICROMIPS ? " -mmicromips" : "",
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index b4a60a55d80..b8399fe1b0d 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -103,11 +103,9 @@ struct mips_cpu_info {
 #define TARGET_RTP_PIC (TARGET_VXWORKS_RTP && flag_pic)
 
 /* Compact branches must not be used if the user either selects the
-   'never' policy or the 'optimal' policy on a core that lacks
+   'never' policy or the 'optimal' / 'always' policy on a core that lacks
    compact branch instructions.  */
-#define TARGET_CB_NEVER (mips_cb == MIPS_CB_NEVER      \
-                        || (mips_cb == MIPS_CB_OPTIMAL \
-                            && !ISA_HAS_COMPACT_BRANCHES))
+#define TARGET_CB_NEVER (mips_cb == MIPS_CB_NEVER || !ISA_HAS_COMPACT_BRANCHES)
 
 /* Compact branches may be used if the user either selects the
    'always' policy or the 'optimal' policy on a core that supports
@@ -117,10 +115,11 @@ struct mips_cpu_info {
                             && ISA_HAS_COMPACT_BRANCHES))
 
 /* Compact branches must always be generated if the user selects
-   the 'always' policy or the 'optimal' policy om a core that
-   lacks delay slot branch instructions.  */
-#define TARGET_CB_ALWAYS (mips_cb == MIPS_CB_ALWAYS    \
-                        || (mips_cb == MIPS_CB_OPTIMAL \
+   the 'always' policy on a core support compact branches,
+   or the 'optimal' policy on a core that lacks delay slot branch 
instructions.  */
+#define TARGET_CB_ALWAYS ((mips_cb == MIPS_CB_ALWAYS     \
+                            && ISA_HAS_COMPACT_BRANCHES) \
+                        || (mips_cb == MIPS_CB_OPTIMAL   \
                             && !ISA_HAS_DELAY_SLOTS))
 
 /* Special handling for JRC that exists in microMIPSR3 as well as R6
@@ -655,6 +654,13 @@ struct mips_cpu_info {
        builtin_define ("__mips_no_lxc1_sxc1");                         \
       if (!ISA_HAS_UNFUSED_MADD4 && !ISA_HAS_FUSED_MADD4)              \
        builtin_define ("__mips_no_madd4");                             \
+                                                                       \
+      if (TARGET_CB_NEVER)                                             \
+       builtin_define ("__mips_compact_branches_never");               \
+      else if (TARGET_CB_ALWAYS)                                       \
+       builtin_define ("__mips_compact_branches_always");              \
+      else                                                             \
+       builtin_define ("__mips_compact_branches_optimal");             \
     }                                                                  \
   while (0)
 
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index c00514a6306..63f9b85d7ab 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -25227,6 +25227,7 @@ instruction is not available, a delay slot form of the 
branch will be
 used instead.
 
 This option is supported from MIPS Release 6 onwards.
+If it is used for pre-R6 target, it will be just ignored.
 
 The @option{-mcompact-branches=optimal} option will cause a delay slot
 branch to be used if one is available in the current ISA and the delay
diff --git a/gcc/testsuite/gcc.target/mips/compact-branches-1.c 
b/gcc/testsuite/gcc.target/mips/compact-branches-1.c
index 9c7365e2659..6b8e1978d87 100644
--- a/gcc/testsuite/gcc.target/mips/compact-branches-1.c
+++ b/gcc/testsuite/gcc.target/mips/compact-branches-1.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mcompact-branches=always -mno-micromips" } */
+/* { dg-options "-mcompact-branches=always -mno-micromips isa_rev>=6" } */
 int glob;
 
 void
diff --git a/gcc/testsuite/gcc.target/mips/compact-branches-8.c 
b/gcc/testsuite/gcc.target/mips/compact-branches-8.c
new file mode 100644
index 00000000000..1290cedf4b5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/compact-branches-8.c
@@ -0,0 +1,10 @@
+/* { dg-options "-mno-abicalls -mcompact-branches=always isa_rev<=5" } */
+void bar (int);
+
+void
+foo ()
+{
+  bar (1);
+}
+
+/* { dg-final { scan-assembler "\t(j|jal)\t" } } */
diff --git a/gcc/testsuite/gcc.target/mips/compact-branches-9.c 
b/gcc/testsuite/gcc.target/mips/compact-branches-9.c
new file mode 100644
index 00000000000..4b23bf456d1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/compact-branches-9.c
@@ -0,0 +1,10 @@
+/* { dg-options "-mno-abicalls -fno-PIC -mcompact-branches=always isa_rev>=6" 
} */
+void bar (int);
+
+void
+foo ()
+{
+  bar (1);
+}
+
+/* { dg-final { scan-assembler "\t(bc|balc)\t" } } */
diff --git a/gcc/testsuite/gcc.target/mips/mips.exp 
b/gcc/testsuite/gcc.target/mips/mips.exp
index 01292316944..4b46b97a884 100644
--- a/gcc/testsuite/gcc.target/mips/mips.exp
+++ b/gcc/testsuite/gcc.target/mips/mips.exp
@@ -1163,10 +1163,8 @@ proc mips-dg-options { args } {
        # We need a revision 6 or better ISA for:
        #
        #   - When the LSA instruction is required
-       #   - When only using compact branches
        if { $isa_rev < 6
-            && ([mips_have_test_option_p options "HAS_LSA"]
-                || [mips_have_test_option_p options 
"-mcompact-branches=always"]) } {
+            && ([mips_have_test_option_p options "HAS_LSA"]) } {
            if { $gp_size == 32 } {
                mips_make_test_option options "-mips32r6"
            } else {
-- 
2.20.1

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