diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def
index 2f50ecc6d2fcedd16f7e8a79e37c55d2e0282cee..48e481c0f96ec44bbc86239f9f4457328f5b81b6 100644
--- a/gcc/config/aarch64/aarch64-simd-builtins.def
+++ b/gcc/config/aarch64/aarch64-simd-builtins.def
@@ -705,6 +705,9 @@
   /* Implemented by aarch64_rsqrts<mode>.  */
   BUILTIN_VHSDF_HSDF (BINOP, rsqrts, 0, FP)
 
+  /* Implemented by aarch64_ursqrte<mode>.  */
+  BUILTIN_VDQ_SI (UNOPU, ursqrte, 0, NONE)
+
   /* Implemented by fabd<mode>3.  */
   BUILTIN_VHSDF_HSDF (BINOP, fabd, 3, FP)
 
diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
index eea5c87576d44908b49ed967b0605901cc264426..767d6739794b1bb113bae2a01ef65724020ca239 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -755,6 +755,14 @@ (define_expand "rsqrt<mode>2"
   DONE;
 })
 
+(define_insn "aarch64_ursqrte<mode>"
+[(set (match_operand:VDQ_SI 0 "register_operand" "=w")
+      (unspec:VDQ_SI [(match_operand:VDQ_SI 1 "register_operand" "w")]
+		   UNSPEC_RSQRTE))]
+"TARGET_SIMD"
+"ursqrte\\t%<v>0<Vmtype>, %<v>1<Vmtype>"
+[(set_attr "type" "neon_fp_rsqrte_<stype><q>")])
+
 (define_insn "*aarch64_mul3_elt_to_64v2df"
   [(set (match_operand:DF 0 "register_operand" "=w")
      (mult:DF
diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
index e32f7ab91412adcfcbcce674c0775b85c9fd5777..4b905d9d73159e12a9797d1245199527eb4430f1 100644
--- a/gcc/config/aarch64/arm_neon.h
+++ b/gcc/config/aarch64/arm_neon.h
@@ -9387,24 +9387,14 @@ __extension__ extern __inline uint32x2_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vrsqrte_u32 (uint32x2_t __a)
 {
-  uint32x2_t __result;
-  __asm__ ("ursqrte %0.2s,%1.2s"
-           : "=w"(__result)
-           : "w"(__a)
-           : /* No clobbers */);
-  return __result;
+  return __builtin_aarch64_ursqrtev2si_uu (__a);
 }
 
 __extension__ extern __inline uint32x4_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vrsqrteq_u32 (uint32x4_t __a)
 {
-  uint32x4_t __result;
-  __asm__ ("ursqrte %0.4s,%1.4s"
-           : "=w"(__result)
-           : "w"(__a)
-           : /* No clobbers */);
-  return __result;
+  return __builtin_aarch64_ursqrtev4si_uu (__a);
 }
 
 __extension__ extern __inline int8x16_t