On Tue, 19 Jan 2021 at 18:31, Kyrylo Tkachov via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> Hi all,
>
> Since we don't guarantee the ordering of the QC flag in FPSR in the 
> saturation intrinsics, we shouldn't be testing for it.
> I want to relax the flags for some of the builtins to enable more 
> optimisation but that triggers the QC flag tests in advsimd-intrinsics.exp.
> We don't implement the saturation flag access intrinsics in aarch64 anyway 
> and we don't want to.

So this means that the tests would no longer catch an unexpected
regression on arm wrt QC flag?

IIUC, this also means that the QC flag is only meaningful with writing
assembly after these two patches?

>
> Tested on aarch64-none-elf and arm-none-eabi.
>
> Pushing to master.
> Thanks,
> Kyrill
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h 
> (CHECK_CUMULATIVE_SAT): Delete.
>         (CHECK_CUMULATIVE_SAT_NAMED): Likewise.  Deleted related variables.
>         * gcc.target/aarch64/advsimd-intrinsics/binary_sat_op.inc: Remove 
> uses of the above.
>         * gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqabs.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqadd.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqdmlXl.inc: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqdmlXl_lane.inc: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqdmlXl_n.inc: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqdmlal.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqdmlal_lane.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqdmlal_n.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqdmlsl.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqdmlsl_lane.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqdmlsl_n.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqdmulh.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqdmulh_lane.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqdmulh_n.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqdmull.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqdmull_lane.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqdmull_n.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqmovn.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqmovun.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqneg.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqrdmlXh.inc: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqrdmlXh_lane.inc: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqrdmlah.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqrdmlah_lane.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqrdmlsh.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqrdmlsh_lane.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqrdmulh.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqrdmulh_lane.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqrdmulh_n.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqrshl.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqrshrn_n.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqrshrun_n.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqshl.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqshl_n.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqshlu_n.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqshrn_n.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqshrun_n.c: Likewise.
>         * gcc.target/aarch64/advsimd-intrinsics/vqsub.c: Likewise.

Reply via email to