On 12/31/20 4:34 PM, Xi Ruoyao via Gcc-patches wrote:
> On 2021-01-01 07:29 +0800, Xi Ruoyao wrote:
>> An invalid use of MSA_SUPPORTED_MODE_P is causing ICE on mips64el with -mmsa.
>> The detailed analysis is posted on bugzilla:
>>
>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98491
>>
>> The attached patch fixes this issue by handling the special case of
>> MSA_SUPPORTED_MODE_P explicitly.
>>
>> Please keep me in CC since I'm not a subscriber.
>>
>> And, I don't have GIT write access.
> Sorry, I forgot to include the ChangeLog:
>
> gcc/ChangeLog:
>
> 2020-12-31 Xi Ruoyao <xry...@mengyan1223.wang>
>
> PR target/98491
> * config/mips/mips.c (mips_symbol_insns): Do not use
> MSA_SUPPORTED_MODE_P if mode is MAX_MACHINE_MODE.
So I absolutely agree the current code is wrong as it does an out of
bounds array access.
Would it be better to instead to change MSA_SUPPORTED_MODE_P to evaluate
to zero if MODE is MAX_MACHINE_MODE? That would protect all the uses of
MSA_SUPPORTED_MODE_P. Something like this perhaps?
Jeff
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index b4a60a55d80..a159bb22381 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -2418,6 +2418,7 @@ enum reg_class
/* True if MODE is vector and supported in a MSA vector register. */
#define MSA_SUPPORTED_MODE_P(MODE) \
(ISA_HAS_MSA \
+ && (MODE) != MAX_MACHINE_MODE
&& GET_MODE_SIZE (MODE) == UNITS_PER_MSA_REG \
&& (GET_MODE_CLASS (MODE) == MODE_VECTOR_INT \
|| GET_MODE_CLASS (MODE) == MODE_VECTOR_FLOAT))
