Hi Segher,

on 2020/12/22 下午9:55, Segher Boessenkool wrote:
> Hi!
> 
> Just a dumb formatting comment:
> 
> On Tue, Dec 22, 2020 at 04:05:39PM +0800, Kewen.Lin wrote:
>> This patch is to make move_unallocated_pseudos consistent
>> to what we have in function find_moveable_pseudos, where we
>> record the original pseudo into pseudo_replaced_reg only if
>> validate_change succeeds with newreg.  To ensure every
>> unallocated pseudo in move_unallocated_pseudos has expected
>> information, it's better to add a check and skip it if it's
>> unexpected.  This avoids possible ICEs in future.
>>
>> btw, I happened to found this in the bootstrapping for one
>> experimental local patch, which is considered as impractical.
> 
>> --- a/gcc/ira.c
>> +++ b/gcc/ira.c
>> @@ -5111,6 +5111,11 @@ move_unallocated_pseudos (void)
>>        {
>>      int idx = i - first_moveable_pseudo;
>>      rtx other_reg = pseudo_replaced_reg[idx];
>> +    /* If there is no appropriate pseudo in pseudo_replaced_reg, it
>> +       means validate_change fails for this new pseudo in function
>> +       find_moveable_pseudos, then bypass it here.*/
> 
> Dot space space.

Good catch, thanks!  I forgot to reformat after polishing the comments.
Will fix it with other potential comments.

> 
> The patch sounds fine to me.  Hard to tell without seeing the patch that
> exposed the problem (for onlookers like me who do not know this code
> well, anyway ;-) )

The patch which made this issue exposed looks like:

+; Like *rotl<mode>3_insert_3 but work with nonzero_bits rather than
+; explicit AND.
+(define_insn "*rotl<mode>3_insert_8"
+  [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
+        (ior:GPR (ashift:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")
+                             (match_operand:SI 2 "u6bit_cint_operand" "n"))
+                 (match_operand:GPR 3 "gpc_reg_operand" "0")))]
+  "HOST_WIDE_INT_1U << INTVAL (operands[2])
+   > nonzero_bits (operands[3], <MODE>mode)"
+{
+  if (<MODE>mode == SImode)
+    return "rlwimi %0,%1,%h2,0,31-%h2";
+  else
+    return "rldimi %0,%1,%H2,0";
+}
+  [(set_attr "type" "insert")])

Some insn matches this pattern in combine, later ira tries to introduce
one new pseudo since it meets the checks in find_moveable_pseudos, but
it fails in the call to validate_change since the nonzero_bits is more
rough and can't satisfy the pattern condition, leaving the unexpected
entry in pseudo_replaced_reg.

BR,
Kewen

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