From: Aaron Sawdey <acsaw...@linux.ibm.com>

This adds some test cases to make sure that the combine patterns for p10
fusion are working.

These test cases pass on power10. OK for trunk after the 2 previous patches
for the fusion patterns go in?

Thanks!
   Aaron

gcc/testsuite/ChangeLog:
        * gcc.target/powerpc/fusion-p10-ldcmpi.c: New file.
        * gcc.target/powerpc/fusion-p10-2logical.c: New file.
---
 .../gcc.target/powerpc/fusion-p10-2logical.c  | 201 ++++++++++++++++++
 .../gcc.target/powerpc/fusion-p10-ldcmpi.c    |  66 ++++++
 2 files changed, 267 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/fusion-p10-2logical.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c

diff --git a/gcc/testsuite/gcc.target/powerpc/fusion-p10-2logical.c 
b/gcc/testsuite/gcc.target/powerpc/fusion-p10-2logical.c
new file mode 100644
index 00000000000..cfe8f6c679a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fusion-p10-2logical.c
@@ -0,0 +1,201 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } } */
+/* { dg-options "-mdejagnu-cpu=power10 -O3 -dp" } */
+
+#include <altivec.h>
+#include <stdint.h>
+
+/* and/andc/eqv/nand/nor/or/orc/xor */
+#define AND(a,b) ((a)&(b))
+#define ANDC1(a,b) ((a)&((~b)))
+#define ANDC2(a,b) ((~(a))&(b))
+#define EQV(a,b) (~((a)^(b)))
+#define NAND(a,b) (~((a)&(b)))
+#define NOR(a,b) (~((a)|(b)))
+#define OR(a,b) ((a)|(b))
+#define ORC1(a,b) ((a)|((~b)))
+#define ORC2(a,b) ((~(a))|(b))
+#define XOR(a,b) ((a)^(b))
+#define TEST1(type, func)                                                      
\
+  type func ## _and_T_     ## type (type a, type b, type c) { return 
AND(func(a,b),c); } \
+  type func ## _andc1_T_   ## type (type a, type b, type c) { return 
ANDC1(func(a,b),c); } \
+  type func ## _andc2_T_   ## type (type a, type b, type c) { return 
ANDC2(func(a,b),c); } \
+  type func ## _eqv_T_     ## type (type a, type b, type c) { return 
EQV(func(a,b),c); } \
+  type func ## _nand_T_    ## type (type a, type b, type c) { return 
NAND(func(a,b),c); } \
+  type func ## _nor_T_     ## type (type a, type b, type c) { return 
NOR(func(a,b),c); } \
+  type func ## _or_T_      ## type (type a, type b, type c) { return 
OR(func(a,b),c); } \
+  type func ## _orc1_T_    ## type (type a, type b, type c) { return 
ORC1(func(a,b),c); } \
+  type func ## _orc2_T_    ## type (type a, type b, type c) { return 
ORC2(func(a,b),c); } \
+  type func ## _xor_T_     ## type (type a, type b, type c) { return 
XOR(func(a,b),c); } \
+  type func ## _rev_and_T_     ## type (type a, type b, type c) { return 
AND(c,func(a,b)); } \
+  type func ## _rev_andc1_T_   ## type (type a, type b, type c) { return 
ANDC1(c,func(a,b)); } \
+  type func ## _rev_andc2_T_   ## type (type a, type b, type c) { return 
ANDC2(c,func(a,b)); } \
+  type func ## _rev_eqv_T_     ## type (type a, type b, type c) { return 
EQV(c,func(a,b)); } \
+  type func ## _rev_nand_T_    ## type (type a, type b, type c) { return 
NAND(c,func(a,b)); } \
+  type func ## _rev_nor_T_     ## type (type a, type b, type c) { return 
NOR(c,func(a,b)); } \
+  type func ## _rev_or_T_      ## type (type a, type b, type c) { return 
OR(c,func(a,b)); } \
+  type func ## _rev_orc1_T_    ## type (type a, type b, type c) { return 
ORC1(c,func(a,b)); } \
+  type func ## _rev_orc2_T_    ## type (type a, type b, type c) { return 
ORC2(c,func(a,b)); } \
+  type func ## _rev_xor_T_     ## type (type a, type b, type c) { return 
XOR(c,func(a,b)); }
+#define TEST(type)    \
+  TEST1(type,AND)     \
+  TEST1(type,ANDC1)   \
+  TEST1(type,ANDC2)   \
+  TEST1(type,EQV)     \
+  TEST1(type,NAND)    \
+  TEST1(type,NOR)     \
+  TEST1(type,OR)      \
+  TEST1(type,ORC1)    \
+  TEST1(type,ORC2)    \
+  TEST1(type,XOR)
+
+typedef vector bool char vboolchar_t;
+typedef vector unsigned int vuint_t;
+
+TEST(uint8_t);
+TEST(int8_t);
+TEST(uint16_t);
+TEST(int16_t);
+TEST(uint32_t);
+TEST(int32_t);
+TEST(uint64_t);
+TEST(int64_t);
+TEST(vboolchar_t);
+TEST(vuint_t);
+  
+/* { dg-final { scan-assembler-times "fuse_and_and/0"        16 } } */
+/* { dg-final { scan-assembler-times "fuse_and_and/2"        16 } } */
+/* { dg-final { scan-assembler-times "fuse_andc_and/0"       48 } } */
+/* { dg-final { scan-assembler-times "fuse_andc_and/1"       16 } } */
+/* { dg-final { scan-assembler-times "fuse_andc_and/2"       26 } } */
+/* { dg-final { scan-assembler-times "fuse_andc_and/3"        6 } } */
+/* { dg-final { scan-assembler-times "fuse_andc_or/0"        32 } } */
+/* { dg-final { scan-assembler-times "fuse_andc_or/1"        16 } } */
+/* { dg-final { scan-assembler-times "fuse_andc_or/2"        16 } } */
+/* { dg-final { scan-assembler-times "fuse_andc_orc/0"       48 } } */
+/* { dg-final { scan-assembler-times "fuse_andc_orc/1"        8 } } */
+/* { dg-final { scan-assembler-times "fuse_andc_orc/2"        8 } } */
+/* { dg-final { scan-assembler-times "fuse_andc_xor/0"       32 } } */
+/* { dg-final { scan-assembler-times "fuse_andc_xor/1"       16 } } */
+/* { dg-final { scan-assembler-times "fuse_andc_xor/2"       16 } } */
+/* { dg-final { scan-assembler-times "fuse_and_eqv/0"        24 } } */
+/* { dg-final { scan-assembler-times "fuse_and_eqv/1"         8 } } */
+/* { dg-final { scan-assembler-times "fuse_and_or/0"         16 } } */
+/* { dg-final { scan-assembler-times "fuse_and_or/1"         16 } } */
+/* { dg-final { scan-assembler-times "fuse_and_orc/0"        24 } } */
+/* { dg-final { scan-assembler-times "fuse_and_orc/1"         8 } } */
+/* { dg-final { scan-assembler-times "fuse_and_xor/0"        16 } } */
+/* { dg-final { scan-assembler-times "fuse_and_xor/1"        16 } } */
+/* { dg-final { scan-assembler-times "fuse_eqv_and/0"        16 } } */
+/* { dg-final { scan-assembler-times "fuse_eqv_and/1"        16 } } */
+/* { dg-final { scan-assembler-times "fuse_eqv_andc/0"       24 } } */
+/* { dg-final { scan-assembler-times "fuse_eqv_andc/1"        8 } } */
+/* { dg-final { scan-assembler-times "fuse_eqv_or/0"         24 } } */
+/* { dg-final { scan-assembler-times "fuse_eqv_or/1"          8 } } */
+/* { dg-final { scan-assembler-times "fuse_nand_and/0"       16 } } */
+/* { dg-final { scan-assembler-times "fuse_nand_and/1"       16 } } */
+/* { dg-final { scan-assembler-times "fuse_nand_andc/0"      24 } } */
+/* { dg-final { scan-assembler-times "fuse_nand_andc/1"       8 } } */
+/* { dg-final { scan-assembler-times "fuse_nand_or/0"        72 } } */
+/* { dg-final { scan-assembler-times "fuse_nand_or/1"        14 } } */
+/* { dg-final { scan-assembler-times "fuse_nand_or/2"         2 } } */
+/* { dg-final { scan-assembler-times "fuse_nand_or/3"         8 } } */
+/* { dg-final { scan-assembler-times "fuse_nand_orc/0"       24 } } */
+/* { dg-final { scan-assembler-times "fuse_nand_orc/3"        8 } } */
+/* { dg-final { scan-assembler-times "fuse_nor_and/0"        48 } } */
+/* { dg-final { scan-assembler-times "fuse_nor_and/1"        28 } } */
+/* { dg-final { scan-assembler-times "fuse_nor_and/2"         4 } } */
+/* { dg-final { scan-assembler-times "fuse_nor_and/3"        16 } } */
+/* { dg-final { scan-assembler-times "fuse_nor_andc/0"       24 } } */
+/* { dg-final { scan-assembler-times "fuse_nor_andc/3"        8 } } */
+/* { dg-final { scan-assembler-times "fuse_nor_or/0"         24 } } */
+/* { dg-final { scan-assembler-times "fuse_nor_or/1"          8 } } */
+/* { dg-final { scan-assembler-times "fuse_nor_orc/0"        24 } } */
+/* { dg-final { scan-assembler-times "fuse_nor_orc/1"         8 } } */
+/* { dg-final { scan-assembler-times "fuse_or_and/0"         16 } } */
+/* { dg-final { scan-assembler-times "fuse_or_and/1"         16 } } */
+/* { dg-final { scan-assembler-times "fuse_or_andc/0"        16 } } */
+/* { dg-final { scan-assembler-times "fuse_or_andc/1"        16 } } */
+/* { dg-final { scan-assembler-times "fuse_orc_and/0"        32 } } */
+/* { dg-final { scan-assembler-times "fuse_orc_and/1"        16 } } */
+/* { dg-final { scan-assembler-times "fuse_orc_and/2"        16 } } */
+/* { dg-final { scan-assembler-times "fuse_orc_andc/0"       48 } } */
+/* { dg-final { scan-assembler-times "fuse_orc_andc/1"        8 } } */
+/* { dg-final { scan-assembler-times "fuse_orc_andc/2"        8 } } */
+/* { dg-final { scan-assembler-times "fuse_orc_or/0"         72 } } */
+/* { dg-final { scan-assembler-times "fuse_orc_or/1"          8 } } */
+/* { dg-final { scan-assembler-times "fuse_orc_or/2"         10 } } */
+/* { dg-final { scan-assembler-times "fuse_orc_or/3"          6 } } */
+/* { dg-final { scan-assembler-times "fuse_orc_xor/0"        48 } } */
+/* { dg-final { scan-assembler-times "fuse_orc_xor/1"         8 } } */
+/* { dg-final { scan-assembler-times "fuse_orc_xor/2"         8 } } */
+/* { dg-final { scan-assembler-times "fuse_or_eqv/0"         24 } } */
+/* { dg-final { scan-assembler-times "fuse_or_eqv/1"          8 } } */
+/* { dg-final { scan-assembler-times "fuse_or_or/0"          16 } } */
+/* { dg-final { scan-assembler-times "fuse_or_or/2"          16 } } */
+/* { dg-final { scan-assembler-times "fuse_or_xor/0"         16 } } */
+/* { dg-final { scan-assembler-times "fuse_or_xor/1"         16 } } */
+/* { dg-final { scan-assembler-times "fuse_vandc_vand/1"      8 } } */
+/* { dg-final { scan-assembler-times "fuse_vandc_vand/2"     10 } } */
+/* { dg-final { scan-assembler-times "fuse_vandc_vand/3"      6 } } */
+/* { dg-final { scan-assembler-times "fuse_vandc_vor/1"       8 } } */
+/* { dg-final { scan-assembler-times "fuse_vandc_vor/2"       8 } } */
+/* { dg-final { scan-assembler-times "fuse_vandc_vorc/1"      8 } } */
+/* { dg-final { scan-assembler-times "fuse_vandc_vorc/2"      8 } } */
+/* { dg-final { scan-assembler-times "fuse_vandc_vxor/1"      8 } } */
+/* { dg-final { scan-assembler-times "fuse_vandc_vxor/2"      8 } } */
+/* { dg-final { scan-assembler-times "fuse_vand_vand/2"       8 } } */
+/* { dg-final { scan-assembler-times "fuse_vand_veqv/1"       8 } } */
+/* { dg-final { scan-assembler-times "fuse_vand_vor/1"        8 } } */
+/* { dg-final { scan-assembler-times "fuse_vand_vorc/1"       8 } } */
+/* { dg-final { scan-assembler-times "fuse_vand_vxor/1"       8 } } */
+/* { dg-final { scan-assembler-times "fuse_veqv_vand/1"       8 } } */
+/* { dg-final { scan-assembler-times "fuse_veqv_vandc/1"      8 } } */
+/* { dg-final { scan-assembler-times "fuse_veqv_vor/1"        8 } } */
+/* { dg-final { scan-assembler-times "fuse_vnand_vand/1"      8 } } */
+/* { dg-final { scan-assembler-times "fuse_vnand_vandc/1"     8 } } */
+/* { dg-final { scan-assembler-times "fuse_vnand_vor/1"      14 } } */
+/* { dg-final { scan-assembler-times "fuse_vnand_vor/2"       2 } } */
+/* { dg-final { scan-assembler-times "fuse_vnand_vor/3"       8 } } */
+/* { dg-final { scan-assembler-times "fuse_vnand_vorc/3"      8 } } */
+/* { dg-final { scan-assembler-times "fuse_vnor_vand/1"      14 } } */
+/* { dg-final { scan-assembler-times "fuse_vnor_vand/2"       2 } } */
+/* { dg-final { scan-assembler-times "fuse_vnor_vand/3"       8 } } */
+/* { dg-final { scan-assembler-times "fuse_vnor_vandc/3"      8 } } */
+/* { dg-final { scan-assembler-times "fuse_vnor_vor/1"        8 } } */
+/* { dg-final { scan-assembler-times "fuse_vnor_vorc/1"       8 } } */
+/* { dg-final { scan-assembler-times "fuse_vorc_vand/1"       8 } } */
+/* { dg-final { scan-assembler-times "fuse_vorc_vand/2"       8 } } */
+/* { dg-final { scan-assembler-times "fuse_vorc_vandc/1"      8 } } */
+/* { dg-final { scan-assembler-times "fuse_vorc_vandc/2"      8 } } */
+/* { dg-final { scan-assembler-times "fuse_vorc_vor/1"        8 } } */
+/* { dg-final { scan-assembler-times "fuse_vorc_vor/2"       10 } } */
+/* { dg-final { scan-assembler-times "fuse_vorc_vor/3"        6 } } */
+/* { dg-final { scan-assembler-times "fuse_vorc_vxor/1"       8 } } */
+/* { dg-final { scan-assembler-times "fuse_vorc_vxor/2"       8 } } */
+/* { dg-final { scan-assembler-times "fuse_vor_vand/1"        8 } } */
+/* { dg-final { scan-assembler-times "fuse_vor_vandc/1"       8 } } */
+/* { dg-final { scan-assembler-times "fuse_vor_veqv/1"        8 } } */
+/* { dg-final { scan-assembler-times "fuse_vor_vor/2"         8 } } */
+/* { dg-final { scan-assembler-times "fuse_vor_vxor/1"        8 } } */
+/* { dg-final { scan-assembler-times "fuse_vxor_vand/1"       8 } } */
+/* { dg-final { scan-assembler-times "fuse_vxor_vandc/1"      8 } } */
+/* { dg-final { scan-assembler-times "fuse_vxor_veqv/3"       8 } } */
+/* { dg-final { scan-assembler-times "fuse_vxor_vnand/1"      8 } } */
+/* { dg-final { scan-assembler-times "fuse_vxor_vor/1"        8 } } */
+/* { dg-final { scan-assembler-times "fuse_vxor_vorc/1"       8 } } */
+/* { dg-final { scan-assembler-times "fuse_vxor_vxor/2"       8 } } */
+/* { dg-final { scan-assembler-times "fuse_xor_and/0"        16 } } */
+/* { dg-final { scan-assembler-times "fuse_xor_and/1"        16 } } */
+/* { dg-final { scan-assembler-times "fuse_xor_andc/0"       16 } } */
+/* { dg-final { scan-assembler-times "fuse_xor_andc/1"       16 } } */
+/* { dg-final { scan-assembler-times "fuse_xor_eqv/0"        24 } } */
+/* { dg-final { scan-assembler-times "fuse_xor_eqv/3"         8 } } */
+/* { dg-final { scan-assembler-times "fuse_xor_nand/0"       24 } } */
+/* { dg-final { scan-assembler-times "fuse_xor_nand/1"        8 } } */
+/* { dg-final { scan-assembler-times "fuse_xor_or/0"         16 } } */
+/* { dg-final { scan-assembler-times "fuse_xor_or/1"         16 } } */
+/* { dg-final { scan-assembler-times "fuse_xor_orc/0"        24 } } */
+/* { dg-final { scan-assembler-times "fuse_xor_orc/1"         8 } } */
+/* { dg-final { scan-assembler-times "fuse_xor_xor/0"        16 } } */
+/* { dg-final { scan-assembler-times "fuse_xor_xor/2"        16 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c 
b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
new file mode 100644
index 00000000000..3f33f49362e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
@@ -0,0 +1,66 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } } */
+/* { dg-options "-mdejagnu-cpu=power10 -O3 -dp" } */
+
+#include <stdint.h>
+
+#define TEST(type) \
+  struct t ## type { type x[128],a,b,c; };             \
+  struct s ## type { struct t ## type *p; int d,e,f; uint64_t g,h,i; };        
\
+int \
+t ## type (struct s ## type *p) \
+{ \
+  struct t ## type *tp = p->p; \
+  if(!tp || tp->a > ((type)0)) { return p->d; }        \
+  if(!tp || tp->b > ((type)1)) { return p->e; }        \
+  if(!tp || ( ((type)(-1) < 0) && tp->c < ((type)-1))) { return p->f; }        
\
+  return 0; \
+} \
+type \
+t ## type ## _ret (struct s ## type *p) \
+{ \
+  struct t ## type *tp = p->p; \
+  if(!tp || tp->a > ((type)0)) { return tp->a; }       \
+  if(!tp || tp->b > ((type)1)) { return tp->b; }       \
+  if(!tp || ( ((type)(-1) < 0) && tp->c < ((type)-1))) { return tp->c; }       
\
+  return 0; \
+}\
+int \
+t ## type ## _x (struct s ## type *p) \
+{ \
+  struct t ## type *tp = p->p; \
+  if(!tp || tp->x[p->g] > ((type)0)) { return p->d; }  \
+  if(!tp || tp->x[p->h] > ((type)1)) { return p->e; }  \
+  if(!tp || ( ((type)(-1) < 0) && tp->x[p->i] < ((type)-1))) { return p->f; }  
\
+  return 0; \
+} \
+type \
+t ## type ## _x_ret (struct s ## type *p) \
+{ \
+  struct t ## type *tp = p->p; \
+  if(!tp || tp->x[p->g] > ((type)0)) { return tp->x[p->g]; }   \
+  if(!tp || tp->x[p->h] > ((type)1)) { return tp->x[p->h]; }   \
+  if(!tp || ( ((type)(-1) < 0) && tp->x[p->i] < ((type)-1))) { return 
tp->x[p->i]; }   \
+  return 0; \
+}
+
+TEST(uint64_t)
+TEST(int64_t)
+TEST(uint32_t)
+TEST(int32_t)
+TEST(uint16_t)
+TEST(int16_t)
+TEST(uint8_t)
+TEST(int8_t)
+
+/* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero"   
2 } } */
+/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none"    
2 } } */
+/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_DI_CCUNS_none"         
2 } } */
+/* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero"   
2 } } */
+/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none"   
2 } } */
+/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero"     
2 } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign"         
6 } } */
+/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_clobber_CC_none"        
8 } } */
+/* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign"       
8 } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none"       
8 } } */
+/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_DI_CC_none"            
24 } } */
-- 
2.27.0

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