Richard,
Could you review this series and let us know if this is acceptable for Phase 3?
This is a security-relevant (a Spectre variant 2 mitigation) for the Ampere
eMAG…
Thanks,
Philipp.
> On 09.12.2020, at 18:21, Christoph Müllner
> <christoph.muell...@theobroma-systems.com> wrote:
>
> aarch64 already uses a C-function for indirect calls
> (aarch64_indirect_call_asm()). So let's add the same
> abstraction for indirect branches.
>
> This patch has no functional consequence.
>
> gcc/
> * config/aarch64/aarch64.c (aarch64_indirect_branch_asm): Add
> function to output indirect branch instructions.
> * config/aarch64/aarch64.md (indirect_jump): Invoke
> aarch64_indirect_branch_asm() instead of outputting instructions
> direclty.
> * config/aarch64/aarch64.md (sibcall_insn): Likewise.
> * config/aarch64/aarch64.md (sibcall_value_insn): Likewise.
> ---
> gcc/config/aarch64/aarch64-protos.h | 1 +
> gcc/config/aarch64/aarch64.c | 7 +++++++
> gcc/config/aarch64/aarch64.md | 6 +++---
> 3 files changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/gcc/config/aarch64/aarch64-protos.h
> b/gcc/config/aarch64/aarch64-protos.h
> index 2aa3f1fddaa..91ae8b7a0f9 100644
> --- a/gcc/config/aarch64/aarch64-protos.h
> +++ b/gcc/config/aarch64/aarch64-protos.h
> @@ -802,6 +802,7 @@ extern const atomic_ool_names aarch64_ool_ldeor_names;
> tree aarch64_resolve_overloaded_builtin_general (location_t, tree, void *);
>
> const char *aarch64_sls_barrier (int);
> +const char *aarch64_indirect_branch_asm (rtx);
> const char *aarch64_indirect_call_asm (rtx);
> extern bool aarch64_harden_sls_retbr_p (void);
> extern bool aarch64_harden_sls_blr_p (void);
> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
> index 264ccb8beb2..4799679f9e5 100644
> --- a/gcc/config/aarch64/aarch64.c
> +++ b/gcc/config/aarch64/aarch64.c
> @@ -23659,6 +23659,13 @@ aarch64_asm_file_end ()
> #endif
> }
>
> +const char *
> +aarch64_indirect_branch_asm (rtx addr)
> +{
> + output_asm_insn ("br\t%0", &addr);
> + return "";
> +}
> +
> const char *
> aarch64_indirect_call_asm (rtx addr)
> {
> diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
> index eed06de3240..5cf660cc19f 100644
> --- a/gcc/config/aarch64/aarch64.md
> +++ b/gcc/config/aarch64/aarch64.md
> @@ -471,7 +471,7 @@
> [(set (pc) (match_operand:DI 0 "register_operand" "r"))]
> ""
> {
> - output_asm_insn ("br\\t%0", operands);
> + aarch64_indirect_branch_asm (operands[0]);
> return aarch64_sls_barrier (aarch64_harden_sls_retbr_p ());
> }
> [(set_attr "type" "branch")
> @@ -1104,7 +1104,7 @@
> {
> if (which_alternative == 0)
> {
> - output_asm_insn ("br\\t%0", operands);
> + aarch64_indirect_branch_asm (operands[0]);
> return aarch64_sls_barrier (aarch64_harden_sls_retbr_p ());
> }
> return "b\\t%c0";
> @@ -1124,7 +1124,7 @@
> {
> if (which_alternative == 0)
> {
> - output_asm_insn ("br\\t%1", operands);
> + aarch64_indirect_branch_asm (operands[1]);
> return aarch64_sls_barrier (aarch64_harden_sls_retbr_p ());
> }
> return "b\\t%c1";
> --
> 2.29.2
>
